From 78f0c9a7ca3c9c57a46b1bbaa46e0561d2fe8b0e Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 14 Mar 2011 11:29:19 +0100 Subject: [PATCH] microblaze: Add PetaLogix ml605 MMU little-endian ref design Add the first Microblaze little endian platform. Platform uses uart16550, axi ethernet, timer, intc. Signed-off-by: Michal Simek Signed-off-by: Edgar E. Iglesias --- Makefile | 2 +- Makefile.target | 1 + hw/petalogix_ml605_mmu.c | 267 ++++++++++++++++++++++++++++++++++++++++++++ hw/xilinx.h | 39 +++++++ pc-bios/petalogix-ml605.dtb | Bin 0 -> 9982 bytes 5 files changed, 308 insertions(+), 1 deletion(-) create mode 100644 hw/petalogix_ml605_mmu.c create mode 100644 pc-bios/petalogix-ml605.dtb diff --git a/Makefile b/Makefile index eca4c76..89e88b4 100644 --- a/Makefile +++ b/Makefile @@ -211,7 +211,7 @@ gpxe-eepro100-80861209.rom \ pxe-e1000.bin \ pxe-ne2k_pci.bin pxe-pcnet.bin \ pxe-rtl8139.bin pxe-virtio.bin \ -bamboo.dtb petalogix-s3adsp1800.dtb \ +bamboo.dtb petalogix-s3adsp1800.dtb petalogix-ml605.dtb \ multiboot.bin linuxboot.bin \ s390-zipl.rom else diff --git a/Makefile.target b/Makefile.target index d11eb4f..62b102a 100644 --- a/Makefile.target +++ b/Makefile.target @@ -266,6 +266,7 @@ obj-mips-y += cirrus_vga.o obj-mips-$(CONFIG_FULONG) += bonito.o vt82c686.o mips_fulong2e.o obj-microblaze-y = petalogix_s3adsp1800_mmu.o +obj-microblaze-y += petalogix_ml605_mmu.o obj-microblaze-y += microblaze_pic_cpu.o obj-microblaze-y += xilinx_intc.o diff --git a/hw/petalogix_ml605_mmu.c b/hw/petalogix_ml605_mmu.c new file mode 100644 index 0000000..ca0986a --- /dev/null +++ b/hw/petalogix_ml605_mmu.c @@ -0,0 +1,267 @@ +/* + * Model of Petalogix linux reference design targeting Xilinx Spartan ml605 + * board. + * + * Copyright (c) 2011 Michal Simek + * Copyright (c) 2011 PetaLogix + * Copyright (c) 2009 Edgar E. Iglesias. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "sysbus.h" +#include "hw.h" +#include "net.h" +#include "flash.h" +#include "sysemu.h" +#include "devices.h" +#include "boards.h" +#include "device_tree.h" +#include "xilinx.h" +#include "loader.h" +#include "elf.h" +#include "blockdev.h" +#include "pc.h" + +#include "xilinx_axidma.h" + +#define LMB_BRAM_SIZE (128 * 1024) +#define FLASH_SIZE (32 * 1024 * 1024) + +static struct +{ + uint32_t bootstrap_pc; + uint32_t cmdline; + uint32_t fdt; +} boot_info; + +static void main_cpu_reset(void *opaque) +{ + CPUState *env = opaque; + + cpu_reset(env); + env->regs[5] = boot_info.cmdline; + env->regs[7] = boot_info.fdt; + env->sregs[SR_PC] = boot_info.bootstrap_pc; + env->pvr.regs[10] = 0x0e000000; /* virtex 6 */ + /* setup pvr to match kernel setting */ + env->pvr.regs[5] |= PVR5_DCACHE_WRITEBACK_MASK; + env->pvr.regs[0] |= PVR0_USE_FPU_MASK | PVR0_ENDI; + env->pvr.regs[0] = (env->pvr.regs[0] & ~PVR0_VERSION_MASK) | (0x14 << 8); + env->pvr.regs[2] ^= PVR2_USE_FPU2_MASK; + env->pvr.regs[4] = 0xc56b8000; + env->pvr.regs[5] = 0xc56be000; +} + +#define BINARY_DEVICE_TREE_FILE "petalogix-ml605.dtb" +static int petalogix_load_device_tree(target_phys_addr_t addr, + uint32_t ramsize, + target_phys_addr_t initrd_base, + target_phys_addr_t initrd_size, + const char *kernel_cmdline) +{ + char *path; + int fdt_size; +#ifdef CONFIG_FDT + void *fdt; + int r; + + /* Try the local "mb.dtb" override. */ + fdt = load_device_tree("mb.dtb", &fdt_size); + if (!fdt) { + path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE); + if (path) { + fdt = load_device_tree(path, &fdt_size); + qemu_free(path); + } + if (!fdt) { + return 0; + } + } + + r = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs", kernel_cmdline); + if (r < 0) { + fprintf(stderr, "couldn't set /chosen/bootargs\n"); + } + cpu_physical_memory_write(addr, (void *)fdt, fdt_size); +#else + /* We lack libfdt so we cannot manipulate the fdt. Just pass on the blob + to the kernel. */ + fdt_size = load_image_targphys("mb.dtb", addr, 0x10000); + if (fdt_size < 0) { + path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE); + if (path) { + fdt_size = load_image_targphys(path, addr, 0x10000); + qemu_free(path); + } + } + + if (kernel_cmdline) { + fprintf(stderr, + "Warning: missing libfdt, cannot pass cmdline to kernel!\n"); + } +#endif + return fdt_size; +} + +static uint64_t translate_kernel_address(void *opaque, uint64_t addr) +{ + return addr - 0x30000000LL; +} + +#define MEMORY_BASEADDR 0x50000000 +#define FLASH_BASEADDR 0x86000000 +#define INTC_BASEADDR 0x81800000 +#define TIMER_BASEADDR 0x83c00000 +#define UART16550_BASEADDR 0x83e00000 +#define AXIENET_BASEADDR 0x82780000 +#define AXIDMA_BASEADDR 0x84600000 + +static void +petalogix_ml605_init(ram_addr_t ram_size, + const char *boot_device, + const char *kernel_filename, + const char *kernel_cmdline, + const char *initrd_filename, const char *cpu_model) +{ + DeviceState *dev; + CPUState *env; + int kernel_size; + DriveInfo *dinfo; + int i; + target_phys_addr_t ddr_base = MEMORY_BASEADDR; + ram_addr_t phys_lmb_bram; + ram_addr_t phys_ram; + ram_addr_t phys_flash; + qemu_irq irq[32], *cpu_irq; + void *serial = NULL; + + /* init CPUs */ + if (cpu_model == NULL) { + cpu_model = "microblaze"; + } + env = cpu_init(cpu_model); + + qemu_register_reset(main_cpu_reset, env); + + /* Attach emulated BRAM through the LMB. */ + phys_lmb_bram = qemu_ram_alloc(NULL, "petalogix_ml605.lmb_bram", + LMB_BRAM_SIZE); + cpu_register_physical_memory(0x00000000, LMB_BRAM_SIZE, + phys_lmb_bram | IO_MEM_RAM); + + phys_ram = qemu_ram_alloc(NULL, "petalogix_ml605.ram", ram_size); + cpu_register_physical_memory(ddr_base, ram_size, phys_ram | IO_MEM_RAM); + + phys_flash = qemu_ram_alloc(NULL, "petalogix_ml605.flash", FLASH_SIZE); + dinfo = drive_get(IF_PFLASH, 0, 0); + /* 5th parameter 2 means bank-width + * 10th paremeter 0 means little-endian */ + pflash_cfi01_register(FLASH_BASEADDR, phys_flash, + dinfo ? dinfo->bdrv : NULL, (64 * 1024), + FLASH_SIZE >> 16, + 2, 0x89, 0x18, 0x0000, 0x0, 0); + + + cpu_irq = microblaze_pic_init_cpu(env); + dev = xilinx_intc_create(INTC_BASEADDR, cpu_irq[0], 4); + for (i = 0; i < 32; i++) { + irq[i] = qdev_get_gpio_in(dev, i); + } + + serial = serial_mm_init(UART16550_BASEADDR + 0x1000, 2, irq[5], + 115200, serial_hds[0], 1, 0); + + /* 2 timers at irq 2 @ 100 Mhz. */ + xilinx_timer_create(TIMER_BASEADDR, irq[2], 2, 100 * 1000000); + + /* axi ethernet and dma initialization. TODO: Dynamically connect them. */ + { + static struct XilinxDMAConnection dmach; + + xilinx_axiethernet_create(&dmach, &nd_table[0], 0x82780000, + irq[3], 0x1000, 0x1000); + xilinx_axiethernetdma_create(&dmach, 0x84600000, + irq[1], irq[0], 100 * 1000000); + } + + if (kernel_filename) { + uint64_t entry, low, high; + uint32_t base32; + int big_endian = 0; + +#ifdef TARGET_WORDS_BIGENDIAN + big_endian = 1; +#endif + + /* Boots a kernel elf binary. */ + kernel_size = load_elf(kernel_filename, NULL, NULL, + &entry, &low, &high, + big_endian, ELF_MACHINE, 0); + base32 = entry; + if (base32 == 0xc0000000) { + kernel_size = load_elf(kernel_filename, translate_kernel_address, + NULL, &entry, NULL, NULL, + big_endian, ELF_MACHINE, 0); + } + /* Always boot into physical ram. */ + boot_info.bootstrap_pc = ddr_base + (entry & 0x0fffffff); + + /* If it wasn't an ELF image, try an u-boot image. */ + if (kernel_size < 0) { + target_phys_addr_t uentry, loadaddr; + + kernel_size = load_uimage(kernel_filename, &uentry, &loadaddr, 0); + boot_info.bootstrap_pc = uentry; + high = (loadaddr + kernel_size + 3) & ~3; + } + + /* Not an ELF image nor an u-boot image, try a RAW image. */ + if (kernel_size < 0) { + kernel_size = load_image_targphys(kernel_filename, ddr_base, + ram_size); + boot_info.bootstrap_pc = ddr_base; + high = (ddr_base + kernel_size + 3) & ~3; + } + + boot_info.cmdline = high + 4096; + if (kernel_cmdline && strlen(kernel_cmdline)) { + pstrcpy_targphys("cmdline", boot_info.cmdline, 256, kernel_cmdline); + } + /* Provide a device-tree. */ + boot_info.fdt = boot_info.cmdline + 4096; + petalogix_load_device_tree(boot_info.fdt, ram_size, + 0, 0, + kernel_cmdline); + } +} + +static QEMUMachine petalogix_ml605_machine = { + .name = "petalogix-ml605", + .desc = "PetaLogix linux refdesign for xilinx ml605 little endian", + .init = petalogix_ml605_init, + .is_default = 0 +}; + +static void petalogix_ml605_machine_init(void) +{ + qemu_register_machine(&petalogix_ml605_machine); +} + +machine_init(petalogix_ml605_machine_init); diff --git a/hw/xilinx.h b/hw/xilinx.h index 705ff5b..090e6f7 100644 --- a/hw/xilinx.h +++ b/hw/xilinx.h @@ -48,3 +48,42 @@ xilinx_ethlite_create(NICInfo *nd, target_phys_addr_t base, qemu_irq irq, sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq); return dev; } + +static inline DeviceState * +xilinx_axiethernet_create(void *dmach, + NICInfo *nd, target_phys_addr_t base, qemu_irq irq, + int txmem, int rxmem) +{ + DeviceState *dev; + qemu_check_nic_model(nd, "xilinx-axienet"); + + dev = qdev_create(NULL, "xilinx,axienet"); + qdev_set_nic_properties(dev, nd); + qdev_prop_set_uint32(dev, "c_rxmem", rxmem); + qdev_prop_set_uint32(dev, "c_txmem", txmem); + qdev_prop_set_ptr(dev, "dmach", dmach); + qdev_init_nofail(dev); + sysbus_mmio_map(sysbus_from_qdev(dev), 0, base); + sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq); + + return dev; +} + +static inline DeviceState * +xilinx_axiethernetdma_create(void *dmach, + target_phys_addr_t base, qemu_irq irq, + qemu_irq irq2, int freqhz) +{ + DeviceState *dev = NULL; + + dev = qdev_create(NULL, "xilinx,axidma"); + qdev_prop_set_uint32(dev, "freqhz", freqhz); + qdev_prop_set_ptr(dev, "dmach", dmach); + qdev_init_nofail(dev); + + sysbus_mmio_map(sysbus_from_qdev(dev), 0, base); + sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq2); + sysbus_connect_irq(sysbus_from_qdev(dev), 1, irq); + + return dev; +} diff --git a/pc-bios/petalogix-ml605.dtb b/pc-bios/petalogix-ml605.dtb new file mode 100644 index 0000000000000000000000000000000000000000..fbbd45fdad06489c6333b6de868f44dfaed405bf GIT binary patch literal 9982 zcmai4Ym6jS6|Uah*?F zp6*E$5Fh+85b?+Uzz0zYCdNlh6r)CB(5x{rkYG@v2Kj{oF&c?6D)^oIs(WuYc$4bB z-#O=g_uO;OeRRz{df>(9J@4p?p66|P-o?xbG@{! zSQ!V&*5(G|evpaB`NKh8v5aHY=BCv!&#F9O*VgsqeeJbQ=j3|3y=vKf=>PH-L+&(M z5$~*+#*nL+lAdBrr4<&#EjbX?HeY`BXQWd;y7Bink9XR~12WP5-A1uA@I7ZlV zt&5Zbl1z{Ys@)Ba%Uf9c@g0~43x`?I6}kB#S7fT>U)^tAXfND|G#>qeja zOi}n4wBp>LlQYh0R^p(`SXld=g(kWTj~FNhwShW zUdPk)rA}#o{dl{Be)#3VWF!aF@x|NI8e7A;zLS^RsHzyvUx&JiF>K~PD0NDP9G?%o zrIX&JzW}VphnDkSbM)Ug^yJ$k?RU^+ zgTkUY9&_5@jNsF%`h3RG|I5Y;iw>qWOhvX|xLiPu(YeXLKxZTsW$)})3m+9~t*4t2 z&$Tp)b6dxe5s&8nQVb?rR|#Y4ha5PZ2IYt)$=c>7>!6U9bl3yEHJu)4ND36`AKhd5 zol^Nrvqp7=Y0julKB|Z3YLo_Bn@D;cZeo0VdQV<%#)l}j=^`HV>C|Ur$XOk z%k$_{XHm0qZQ(OWtfw2BS?A&c?d?YF7HDrb@y{LngoB?4rnpL<7nN@cA9nO@yZz$3 z92`6L6j#$9io1!Gp89RgxLiv=ynOD3Kf#3ic`d%1*bjrU?wmS#vQ2AWZwlk0@*54d z3)&U3iW>$*grdfH&hsw6U1Iv(u_pXLP1{&=No$h!i#a^j9Nzg9Bs4nRZt($o-7J0= zI@JbifAL4HkB_&cJ$Pr$@#5pqQ&IjtE1<$l)FVAozjUFaKPs_^@uaF*>eq3~O8kro zjl`Z6>ov4(V$EAk#aT<`&MSFl#*BQRLN+|_?|c|FD`rbqL$ZoT+RTc{l9P8!ACWAw z@1+!&io$oGZpP?diFr);5mpY1+Q&IomwA##)Q@~WD&&#I;)Ogpy_c{0>VAUslSf*GSv08r8(f`G1PiN&S9@+l|&RKcEC64|W zFcoD_N7kx=--)_0z6)*vrlRa`6;R{598C9LD$1U6hl;}IQC~Ii(+)Q8e;CVwi{5_v zh7&j5@c!#yM@8}+ptZhg;Oh-MhjwRi(>ehe71hSc!vl9iXT0|5+_La@9Q=rbf9v4q zYT*rB~)gJRR z3?Jy13dIijx^k{p^aCytvIW$UA1EvQlkb%_Pscb88=h{SBTslCZoxww*j-R&@thzc zuGM|7oFg8VjY!<^AOqy4Ig5wy;RX-xCoAW0O7-GCmo_|z{44Od?=<%lPn-sQCdeC} zOCb0P7tZjfJCmnE5T|$^62$l<9`ji|5=2qSs>%;>ldrrZRlLh&JQgTCL5>q`E*O_F@akA%lNr74UZVaWnNFTf3lBVpJrgDf0?vg|Y5Zuqdd2fRBO zhDj|4$%T=RZCvHW85S{+$2Km>qL6XG--`ca*9jRirXcv@7H@hDDMpGA0O z2IrghWE+H`o@yf4%`x@DBpaq(R{D9*FOXJvjm49?k(OAowD@MIc1lMj$BrY@M<`f7 zkjp`C8`ybO9v36&Au5!(Wk>X@;JSd=#<8)al{BuxT*$@jST6^KVwmACas3QY&=7fU0!)i!d!*8B!1@RZ-%afZYdEf#LU&2iTEiKxIy17t&qgs4E$^ z0WH8un1?~)r$NZ4pArji#QZ^!ML1Xapn{Ry%?Cl!i-v`e##xvQu{Q9Ej$5T+P}LMU zL`g`9ho8k<55&()4$5&@4dw1!j`25H(V`rWk|6WpzwAT`^jV=W#wuDM3hMN$4bHmZ ztX)ni(3}cuPVO`I5nK=oGY(NQsngO&8s|7&boQ%2r0Kfa4P|IZ;^X!rTvc|}dMbx& zN*X)fsyi$Z&1MTO%Cwx&&L4!ywjWfJER+EN8x9cLy6Pia#Pme03VmE=hSCc|Rn=99 zR~QM!TY3a7j>3LDFwa&9Dam0T6ou4#;Sj4YgNp@2g5kD>O{a(T&8yWQ?#Z);5~9R9 z_Q!GNlkbCF;rJlH-l&u%G&96#BV&hw`}~ERz~m3z`BI#OrAh!2;wep8m=EEkaZ%{A ztd01=Ogacb#}Z&S6|cPfJX5D=UB-R88A)`zBYHi_tEqwYTO#54cAQ1DKf^-qgV>!p z!bdU0Sh_*BZF)?9v!K8g_;-Rl@(U-)=;-9*!y2x`0WJ}KTLw*~z_f+jpmmZ=TgW~8 z6)ZOFUNSna=ysAL8KjSCF!r&y&Cvk1ja`95V|su)wz}iAUbofjj(WpZZ=v*AN#<&}edlhOlabymr zk<%HFhq*j*gq#*6Kk29XAkFMPNaJu}n;G~;Trm8+3MMMCX!kM2GCHnUM#mM)=+wa| z8X=p_uv;?8YRM#}B~yGMo8~iRiqDiOK2xUn2D`X_JN}t6#b?SCpDAnj@)>-Mtl?{9 z4PPTue97+46rU+me5OqCnKH#!;9g1N