From 78ba3e785cda23aa3bdf015988925e7f340f077a Mon Sep 17 00:00:00 2001 From: Paul Walker Date: Tue, 17 Jan 2023 13:06:14 +0000 Subject: [PATCH] [AArch64][SVE] Fix typo after post review change to D141471. --- llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp b/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp index eeaa8ed..3370da4 100644 --- a/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp +++ b/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp @@ -558,8 +558,8 @@ bool AArch64ExpandPseudo::expand_DestructiveOp( if (FalseZero) { // If we cannot prefix the requested instruction we'll instead emit a // prefixed_zeroing_mov for DestructiveBinary. - assert((DOPRegIsUnique || ((DType == AArch64::DestructiveBinary) || - (DType = AArch64::DestructiveBinaryComm))) && + assert((DOPRegIsUnique || DType == AArch64::DestructiveBinary || + DType == AArch64::DestructiveBinaryComm) && "The destructive operand should be unique"); assert(ElementSize != AArch64::ElementSizeNone && "This instruction is unpredicated"); @@ -576,8 +576,8 @@ bool AArch64ExpandPseudo::expand_DestructiveOp( // Create the additional LSL to zero the lanes when the DstReg is not // unique. Zeros the lanes in z0 that aren't active in p0 with sequence // movprfx z0.b, p0/z, z0.b; lsl z0.b, p0/m, z0.b, #0; - if (((DType == AArch64::DestructiveBinary) || - (DType == AArch64::DestructiveBinaryComm)) && + if ((DType == AArch64::DestructiveBinary || + DType == AArch64::DestructiveBinaryComm) && !DOPRegIsUnique) { BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(LSLZero)) .addReg(DstReg, RegState::Define) -- 2.7.4