From 78a6eba86218e929dd48e2d1a7d888e7e0179abc Mon Sep 17 00:00:00 2001 From: Renato Golin Date: Fri, 7 Feb 2014 20:12:49 +0000 Subject: [PATCH] Remove -arm-disable-ehabi option llvm-svn: 200988 --- llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 4 +--- llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp | 11 +---------- llvm/test/CodeGen/ARM/setcc-sentinals.ll | 3 ++- llvm/test/CodeGen/Thumb2/constant-islands.ll | 8 ++++---- llvm/test/MC/ARM/data-in-code.ll | 14 ++++++++++++-- 5 files changed, 20 insertions(+), 20 deletions(-) diff --git a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp index 8235506..68820f4 100644 --- a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp @@ -1104,8 +1104,6 @@ void ARMAsmPrinter::EmitUnwindingInstruction(const MachineInstr *MI) { } } -extern cl::opt DisableARMEHABI; - // Simple pseudo-instructions have their lowering (with expansion to real // instructions) auto-generated. #include "ARMGenMCPseudoLowering.inc" @@ -1120,7 +1118,7 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) { } // Emit unwinding stuff for frame-related instructions - if (Subtarget->isTargetEHABICompatible() && !DisableARMEHABI && + if (Subtarget->isTargetEHABICompatible() && MI->getFlag(MachineInstr::FrameSetup)) EmitUnwindingInstruction(MI); diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp index 5cb6c0b..3c3df1e 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp @@ -16,14 +16,6 @@ using namespace llvm; -// ARM EHABI is experimental but the quality is good enough -// to be turned on by default on non-Darwin ARM targets. -cl::opt -DisableARMEHABI("arm-disable-ehabi", cl::Hidden, - cl::desc("Disable ARM experimental exception handling"), - cl::init(false)); - - void ARMMCAsmInfoDarwin::anchor() { } ARMMCAsmInfoDarwin::ARMMCAsmInfoDarwin() { @@ -54,8 +46,7 @@ ARMELFMCAsmInfo::ARMELFMCAsmInfo() { SupportsDebugInformation = true; // Exceptions handling - if (!DisableARMEHABI) - ExceptionsType = ExceptionHandling::ARM; + ExceptionsType = ExceptionHandling::ARM; // foo(plt) instead of foo@plt UseParensForSymbolVariant = true; diff --git a/llvm/test/CodeGen/ARM/setcc-sentinals.ll b/llvm/test/CodeGen/ARM/setcc-sentinals.ll index 6c38edf..9eeda2a 100644 --- a/llvm/test/CodeGen/ARM/setcc-sentinals.ll +++ b/llvm/test/CodeGen/ARM/setcc-sentinals.ll @@ -1,7 +1,8 @@ -; RUN: llc < %s -mcpu=cortex-a8 -march=arm -asm-verbose=false -arm-disable-ehabi | FileCheck %s +; RUN: llc < %s -mcpu=cortex-a8 -march=arm -asm-verbose=false | FileCheck %s define zeroext i1 @test0(i32 %x) nounwind { ; CHECK-LABEL: test0: +; CHECK-NEXT: .fnstart ; CHECK-NEXT: add [[REG:(r[0-9]+)|(lr)]], r0, #1 ; CHECK-NEXT: mov r0, #0 ; CHECK-NEXT: cmp [[REG]], #1 diff --git a/llvm/test/CodeGen/Thumb2/constant-islands.ll b/llvm/test/CodeGen/Thumb2/constant-islands.ll index 6364b21..255b709 100644 --- a/llvm/test/CodeGen/Thumb2/constant-islands.ll +++ b/llvm/test/CodeGen/Thumb2/constant-islands.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -march=arm -mcpu=cortex-a8 -O0 -filetype=obj -o %t.o -arm-disable-ehabi -; RUN: llc < %s -march=thumb -mcpu=cortex-a8 -O0 -filetype=obj -o %t.o -arm-disable-ehabi -; RUN: llc < %s -march=arm -mcpu=cortex-a8 -O2 -filetype=obj -verify-machineinstrs -o %t.o -arm-disable-ehabi -; RUN: llc < %s -march=thumb -mcpu=cortex-a8 -O2 -filetype=obj -verify-machineinstrs -o %t.o -arm-disable-ehabi +; RUN: llc < %s -march=arm -mcpu=cortex-a8 -O0 -filetype=obj -o %t.o +; RUN: llc < %s -march=thumb -mcpu=cortex-a8 -O0 -filetype=obj -o %t.o +; RUN: llc < %s -march=arm -mcpu=cortex-a8 -O2 -filetype=obj -verify-machineinstrs -o %t.o +; RUN: llc < %s -march=thumb -mcpu=cortex-a8 -O2 -filetype=obj -verify-machineinstrs -o %t.o target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32" target triple = "thumbv7-apple-ios" diff --git a/llvm/test/MC/ARM/data-in-code.ll b/llvm/test/MC/ARM/data-in-code.ll index 0cc882f..3bb017d 100644 --- a/llvm/test/MC/ARM/data-in-code.ll +++ b/llvm/test/MC/ARM/data-in-code.ll @@ -1,8 +1,8 @@ -;; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort -arm-disable-ehabi \ +;; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort \ ;; RUN: -mtriple=armv7-linux-gnueabi -filetype=obj %s -o - | \ ;; RUN: llvm-readobj -t | FileCheck -check-prefix=ARM %s -;; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort -arm-disable-ehabi \ +;; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort \ ;; RUN: -mtriple=thumbv7-linux-gnueabi -filetype=obj %s -o - | \ ;; RUN: llvm-readobj -t | FileCheck -check-prefix=TMB %s @@ -144,6 +144,16 @@ exit: ;; ARM-NEXT: Other: ;; ARM-NEXT: Section: [[MIXED_SECT]] +;; ARM: Symbol { +;; ARM: Name: $d +;; ARM-NEXT: Value: 0x0 +;; ARM-NEXT: Size: 0 +;; ARM-NEXT: Binding: Local (0x0) +;; ARM-NEXT: Type: None (0x0) +;; ARM-NEXT: Other: 0 +;; ARM-NEXT: Section: .ARM.exidx +;; ARM-NEXT: } + ;; ARM-NOT: ${{[atd]}} ;; TMB: Symbol { -- 2.7.4