From 788408b787434662a85e21a3f5f22edbebc5928e Mon Sep 17 00:00:00 2001 From: Anthony Koo Date: Fri, 29 May 2020 17:48:12 -0400 Subject: [PATCH] drm/amd/display: [FW Promotion] Release 1.0.15 [Header Changes] - Add new initialization bits for driver to check firmware status - Add command for HW locking via DMUB Signed-off-by: Anthony Koo Acked-by: Qingqing Zhuo Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 68 +++++++++++++++++++++++-- 1 file changed, 65 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h index 5066c63..7c03c47 100644 --- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h +++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h @@ -36,10 +36,10 @@ /* Firmware versioning. */ #ifdef DMUB_EXPOSE_VERSION -#define DMUB_FW_VERSION_GIT_HASH 0x5470fd231 +#define DMUB_FW_VERSION_GIT_HASH 0xee850bb2f #define DMUB_FW_VERSION_MAJOR 1 #define DMUB_FW_VERSION_MINOR 0 -#define DMUB_FW_VERSION_REVISION 14 +#define DMUB_FW_VERSION_REVISION 15 #define DMUB_FW_VERSION_UCODE ((DMUB_FW_VERSION_MAJOR << 24) | (DMUB_FW_VERSION_MINOR << 16) | DMUB_FW_VERSION_REVISION) #endif @@ -137,8 +137,31 @@ union dmub_fw_meta { }; #pragma pack(pop) + +//============================================================================== +//< DMUB_STATUS>================================================================ +//============================================================================== + +/** + * DMCUB scratch registers can be used to determine firmware status. + * Current scratch register usage is as follows: + * + * SCRATCH0: Legacy status register + * SCRATCH1: Firmware version + * SCRATCH2: Firmware status bits defined by dmub_fw_status_bit + * SCRATCH3: Reserved firmware status bits + */ + +/** + * DMCUB firmware status bits for SCRATCH2. + */ +enum dmub_fw_status_bit { + DMUB_FW_STATUS_BIT_DAL_FIRMWARE = (1 << 0), + DMUB_FW_STATUS_BIT_COMMAND_TABLE_READY = (1 << 1), +}; + //============================================================================== -//================================================================== +//================================================================ //============================================================================== //< DMUB_VBIOS>================================================================= //============================================================================== @@ -230,6 +253,7 @@ enum dmub_cmd_type { DMUB_CMD__PLAT_54186_WA = 5, DMUB_CMD__PSR = 64, DMUB_CMD__ABM = 66, + DMUB_CMD__HW_LOCK = 69, DMUB_CMD__VBIOS = 128, }; @@ -453,6 +477,44 @@ struct dmub_rb_cmd_psr_set_version { struct dmub_cmd_psr_set_version_data psr_set_version_data; }; +union dmub_hw_lock_flags { + struct { + uint8_t lock_pipe : 1; + uint8_t lock_cursor : 1; + uint8_t lock_dig : 1; + uint8_t triple_buffer_lock : 1; + } bits; + + uint8_t u8All; +}; + +struct dmub_hw_lock_inst_flags { + uint8_t otg_inst; + uint8_t opp_inst; + uint8_t dig_inst; + uint8_t pad; +}; + +enum hw_lock_client { + HW_LOCK_CLIENT_DRIVER = 0, + HW_LOCK_CLIENT_FW, + HW_LOCK_CLIENT_INVALID = 0xFFFFFFFF, +}; + +struct dmub_cmd_lock_hw_data { + enum hw_lock_client client; + struct dmub_hw_lock_inst_flags inst_flags; + union dmub_hw_lock_flags hw_locks; + uint8_t lock; + uint8_t should_release; + uint8_t pad; +}; + +struct dmub_rb_cmd_lock_hw { + struct dmub_cmd_header header; + struct dmub_cmd_lock_hw_data lock_hw_data; +}; + enum dmub_cmd_abm_type { DMUB_CMD__ABM_INIT_CONFIG = 0, DMUB_CMD__ABM_SET_PIPE = 1, -- 2.7.4