From 7839422bed58a8f66f146b9149b24cc1325a86eb Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Thu, 9 Feb 2023 12:28:04 +0000 Subject: [PATCH] ASoC: codecs: lpass: fix incorrect mclk rate [ Upstream commit e7621434378c40b62ef858c14ae6415fb6469a8e ] For some reason we ended up with incorrect mclk rate which should be 1920000 instead of 96000, So far we were getting lucky as the same clk is set to 192000 by wsa and va macro. This issue is discovered when there is no wsa macro active and only rx or tx path is tested. Fix this by setting correct rate. Fixes: c39667ddcfc5 ("ASoC: codecs: lpass-tx-macro: add support for lpass tx macro") Fixes: af3d54b99764 ("ASoC: codecs: lpass-rx-macro: add support for lpass rx macro") Signed-off-by: Srinivas Kandagatla Link: https://lore.kernel.org/r/20230209122806.18923-7-srinivas.kandagatla@linaro.org Signed-off-by: Mark Brown Signed-off-by: Sasha Levin --- sound/soc/codecs/lpass-rx-macro.c | 4 ++-- sound/soc/codecs/lpass-tx-macro.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/lpass-rx-macro.c b/sound/soc/codecs/lpass-rx-macro.c index dd6970d..8621cfa 100644 --- a/sound/soc/codecs/lpass-rx-macro.c +++ b/sound/soc/codecs/lpass-rx-macro.c @@ -366,7 +366,7 @@ #define CDC_RX_DSD1_CFG2 (0x0F8C) #define RX_MAX_OFFSET (0x0F8C) -#define MCLK_FREQ 9600000 +#define MCLK_FREQ 19200000 #define RX_MACRO_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\ SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\ @@ -3579,7 +3579,7 @@ static int rx_macro_probe(struct platform_device *pdev) /* set MCLK and NPL rates */ clk_set_rate(rx->mclk, MCLK_FREQ); - clk_set_rate(rx->npl, 2 * MCLK_FREQ); + clk_set_rate(rx->npl, MCLK_FREQ); ret = clk_prepare_enable(rx->macro); if (ret) diff --git a/sound/soc/codecs/lpass-tx-macro.c b/sound/soc/codecs/lpass-tx-macro.c index bc0a0c3..5d1c58d 100644 --- a/sound/soc/codecs/lpass-tx-macro.c +++ b/sound/soc/codecs/lpass-tx-macro.c @@ -202,7 +202,7 @@ #define TX_MACRO_AMIC_UNMUTE_DELAY_MS 100 #define TX_MACRO_DMIC_HPF_DELAY_MS 300 #define TX_MACRO_AMIC_HPF_DELAY_MS 300 -#define MCLK_FREQ 9600000 +#define MCLK_FREQ 19200000 enum { TX_MACRO_AIF_INVALID = 0, @@ -1867,7 +1867,7 @@ static int tx_macro_probe(struct platform_device *pdev) /* set MCLK and NPL rates */ clk_set_rate(tx->mclk, MCLK_FREQ); - clk_set_rate(tx->npl, 2 * MCLK_FREQ); + clk_set_rate(tx->npl, MCLK_FREQ); ret = clk_prepare_enable(tx->macro); if (ret) -- 2.7.4