From 77e546de4cc688b8045686b079e438dafbf9812c Mon Sep 17 00:00:00 2001 From: H Hartley Sweeten Date: Mon, 5 Oct 2015 14:22:58 -0700 Subject: [PATCH] staging: comedi: quatech_daqp_cs: tidy up scanlist register bits For aesthetics, move the bit defines for this register and use the BIT macro to define the bits. Signed-off-by: H Hartley Sweeten Reviewed-by: Ian Abbott Signed-off-by: Greg Kroah-Hartman --- drivers/staging/comedi/drivers/quatech_daqp_cs.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/staging/comedi/drivers/quatech_daqp_cs.c b/drivers/staging/comedi/drivers/quatech_daqp_cs.c index 29eb5bc..8d8ffd3 100644 --- a/drivers/staging/comedi/drivers/quatech_daqp_cs.c +++ b/drivers/staging/comedi/drivers/quatech_daqp_cs.c @@ -55,7 +55,15 @@ * access the 16-bit data. Data is transferred LSB then MSB. */ #define DAQP_AI_FIFO_REG 0x00 + #define DAQP_SCANLIST_REG 0x01 +#define DAQP_SCANLIST_DIFFERENTIAL BIT(14) +#define DAQP_SCANLIST_GAIN(x) (((x) & 0x3) << 12) +#define DAQP_SCANLIST_CHANNEL(x) (((x) & 0xf) << 8) +#define DAQP_SCANLIST_START BIT(7) +#define DAQP_SCANLIST_EXT_GAIN(x) (((x) & 0x3) << 4) +#define DAQP_SCANLIST_EXT_CHANNEL(x) (((x) & 0xf) << 0) + #define DAQP_CTRL_REG 0x02 #define DAQP_STATUS_REG 0x02 #define DAQP_DI_REG 0x03 @@ -68,13 +76,6 @@ #define DAQP_TIMER_REG 0x0a #define DAQP_AUX_REG 0x0f -#define DAQP_SCANLIST_DIFFERENTIAL 0x4000 -#define DAQP_SCANLIST_GAIN(x) ((x) << 12) -#define DAQP_SCANLIST_CHANNEL(x) ((x) << 8) -#define DAQP_SCANLIST_START 0x0080 -#define DAQP_SCANLIST_EXT_GAIN(x) ((x) << 4) -#define DAQP_SCANLIST_EXT_CHANNEL(x) (x) - #define DAQP_CONTROL_PACER_CLK(x) (((x) & 0x3) << 6) #define DAQP_CONTROL_PACER_CLK_EXT DAQP_CONTROL_PACER_CLK(0) #define DAQP_CONTROL_PACER_CLK_5MHZ DAQP_CONTROL_PACER_CLK(1) -- 2.7.4