From 779fed5fdb6098e67213a82dfd27f5b326a75e88 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Sat, 13 Jan 2018 17:57:17 +0000 Subject: [PATCH] Fix folding of vector mask EQ/NE expressions fold_binary_loc assumed that if the type of the result wasn't a vector, the operands wouldn't be either. This isn't necessarily true for EQ_EXPR and NE_EXPR of vector masks, which can return a single scalar for the mask as a whole. 2018-01-13 Richard Sandiford Alan Hayward David Sherwood gcc/ * fold-const.c (fold_binary_loc): Check the argument types rather than the result type when testing for a vector operation. gcc/testsuite/ * gcc.target/aarch64/sve/vec_bool_cmp_1.c: New test. * gcc.target/aarch64/sve/vec_bool_cmp_1_run.c: Likweise. Co-Authored-By: Alan Hayward Co-Authored-By: David Sherwood From-SVN: r256616 --- gcc/ChangeLog | 7 ++++ gcc/fold-const.c | 2 +- gcc/testsuite/ChangeLog | 7 ++++ .../gcc.target/aarch64/sve/vec_bool_cmp_1.c | 40 ++++++++++++++++++++++ .../gcc.target/aarch64/sve/vec_bool_cmp_1_run.c | 37 ++++++++++++++++++++ 5 files changed, 92 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/vec_bool_cmp_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/vec_bool_cmp_1_run.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 64951e9..d965d8f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,4 +1,11 @@ 2018-01-13 Richard Sandiford + Alan Hayward + David Sherwood + + * fold-const.c (fold_binary_loc): Check the argument types + rather than the result type when testing for a vector operation. + +2018-01-13 Richard Sandiford * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document. * doc/tm.texi: Regenerate. diff --git a/gcc/fold-const.c b/gcc/fold-const.c index 521c2dc..cfb1b3d 100644 --- a/gcc/fold-const.c +++ b/gcc/fold-const.c @@ -9323,7 +9323,7 @@ fold_binary_loc (location_t loc, enum tree_code code, tree type, if ((code == BIT_AND_EXPR || code == BIT_IOR_EXPR || code == EQ_EXPR || code == NE_EXPR) - && TREE_CODE (type) != VECTOR_TYPE + && !VECTOR_TYPE_P (TREE_TYPE (arg0)) && ((truth_value_p (TREE_CODE (arg0)) && (truth_value_p (TREE_CODE (arg1)) || (TREE_CODE (arg1) == BIT_AND_EXPR diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 48f40da..9997b28 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,4 +1,11 @@ 2018-01-13 Richard Sandiford + Alan Hayward + David Sherwood + + * gcc.target/aarch64/sve/vec_bool_cmp_1.c: New test. + * gcc.target/aarch64/sve/vec_bool_cmp_1_run.c: Likweise. + +2018-01-13 Richard Sandiford * g++.target/aarch64/sve/aarch64-sve.exp: New harness. * g++.target/aarch64/sve/catch_1.C: New test. diff --git a/gcc/testsuite/gcc.target/aarch64/sve/vec_bool_cmp_1.c b/gcc/testsuite/gcc.target/aarch64/sve/vec_bool_cmp_1.c new file mode 100644 index 0000000..e60d1c5 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/vec_bool_cmp_1.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize" } */ + +#include +#include + +#define VEC_BOOL(NAME, OP, VARTYPE, INDUCTYPE) \ +void __attribute__ ((noinline, noclone)) \ +vec_bool_##NAME##_##VARTYPE##_##INDUCTYPE (VARTYPE *dst, VARTYPE *src, \ + INDUCTYPE start, \ + INDUCTYPE n, \ + INDUCTYPE mask) \ +{ \ + for (INDUCTYPE i = 0; i < n; i++) \ + { \ + bool lhs = i >= start; \ + bool rhs = (i & mask) != 0x3D; \ + if (lhs OP rhs) \ + dst[i] = src[i]; \ + } \ +} + +#define TEST_OP(T, NAME, OP) \ + T (NAME, OP, uint8_t, uint8_t) \ + T (NAME, OP, uint16_t, uint16_t) \ + T (NAME, OP, uint32_t, uint32_t) \ + T (NAME, OP, uint64_t, uint64_t) \ + T (NAME, OP, float, uint32_t) \ + T (NAME, OP, double, uint64_t) + +#define TEST_ALL(T) \ + TEST_OP (T, cmpeq, ==) \ + TEST_OP (T, cmpne, !=) + +TEST_ALL (VEC_BOOL) + +/* Both cmpne and cmpeq loops will contain an exclusive predicate or. */ +/* { dg-final { scan-assembler-times {\teors?\tp[0-9]*\.b, p[0-7]/z, p[0-9]*\.b, p[0-9]*\.b\n} 12 } } */ +/* cmpeq will also contain a predicate not operation. */ +/* { dg-final { scan-assembler-times {\tnot\tp[0-9]*\.b, p[0-7]/z, p[0-9]*\.b\n} 6 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/vec_bool_cmp_1_run.c b/gcc/testsuite/gcc.target/aarch64/sve/vec_bool_cmp_1_run.c new file mode 100644 index 0000000..cd0fd56 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/vec_bool_cmp_1_run.c @@ -0,0 +1,37 @@ +/* { dg-do run { target { aarch64_sve_hw } } } */ +/* { dg-options "-O3 -fno-inline" } */ + +#include "vec_bool_cmp_1.c" + +#define N 103 + +#define TEST_VEC_BOOL(NAME, OP, VARTYPE, INDUCTYPE) \ +{ \ + INDUCTYPE i; \ + VARTYPE src[N]; \ + VARTYPE dst[N]; \ + for (i = 0; i < N; i++) \ + { \ + src[i] = i; \ + dst[i] = i * 2; \ + asm volatile ("" ::: "memory"); \ + } \ + vec_bool_##NAME##_##VARTYPE##_##INDUCTYPE (dst, src, 13, \ + 97, 0xFF); \ + for (i = 0; i < 13; i++) \ + if (dst[i] != (VARTYPE) (0 OP 1 ? i : i * 2)) \ + __builtin_abort (); \ + for (i = 13; i < 97; i++) \ + if (dst[i] != (VARTYPE) (1 OP (i != 0x3D) ? i : i * 2)) \ + __builtin_abort (); \ + for (i = 97; i < N; i++) \ + if (dst[i] != (i * 2)) \ + __builtin_abort (); \ +} + +int __attribute__ ((optimize (1))) +main () +{ + TEST_ALL (TEST_VEC_BOOL) + return 0; +} -- 2.7.4