From 777c5e94c163e07ad8676ac37cc8e20301f63f80 Mon Sep 17 00:00:00 2001 From: Fernando Apesteguia Date: Wed, 28 Sep 2016 19:20:39 +0200 Subject: [PATCH] staging: dgnc: Fix lines longer than 80 characters All the chunks of the patch apply to comments save the first one. Signed-off-by: Fernando Apesteguia Signed-off-by: Greg Kroah-Hartman --- drivers/staging/dgnc/dgnc_neo.c | 67 ++++++++++++++++++++++++++++------------- 1 file changed, 46 insertions(+), 21 deletions(-) diff --git a/drivers/staging/dgnc/dgnc_neo.c b/drivers/staging/dgnc/dgnc_neo.c index e794056..5becb37 100644 --- a/drivers/staging/dgnc/dgnc_neo.c +++ b/drivers/staging/dgnc/dgnc_neo.c @@ -449,7 +449,8 @@ static inline void neo_parse_isr(struct dgnc_board *brd, uint port) flags); } } else if (cause == UART_17158_XOFF_DETECT) { - if (!(brd->channels[port]->ch_flags & CH_STOP)) { + if (!(brd->channels[port]->ch_flags & + CH_STOP)) { spin_lock_irqsave(&ch->ch_lock, flags); ch->ch_flags |= CH_STOP; @@ -554,7 +555,8 @@ static inline void neo_parse_lsr(struct dgnc_board *brd, uint port) * Rx Oruns. Exar says that an orun will NOT corrupt * the FIFO. It will just replace the holding register * with this new data byte. So basically just ignore this. - * Probably we should eventually have an orun stat in our driver... + * Probably we should eventually have an orun stat in our + * driver... */ ch->ch_err_overrun++; } @@ -949,14 +951,18 @@ static irqreturn_t neo_intr(int irq, void *voidbrd) /* * If 0, no interrupts pending. - * This can happen if the IRQ is shared among a couple Neo/Classic boards. + * This can happen if the IRQ is shared among a couple Neo/Classic + * boards. */ if (!uart_poll) { spin_unlock_irqrestore(&brd->bd_intr_lock, flags); return IRQ_NONE; } - /* At this point, we have at least SOMETHING to service, dig further... */ + /* + * At this point, we have at least SOMETHING to service, dig + * further... + */ /* Loop on each port */ while ((uart_poll & 0xff) != 0) { @@ -980,7 +986,10 @@ static irqreturn_t neo_intr(int irq, void *voidbrd) ch = brd->channels[port]; neo_copy_data_from_uart_to_queue(ch); - /* Call our tty layer to enforce queue flow control if needed. */ + /* + * Call our tty layer to enforce queue flow control if + * needed. + */ spin_lock_irqsave(&ch->ch_lock, flags2); dgnc_check_queue_flow_control(ch); spin_unlock_irqrestore(&ch->ch_lock, flags2); @@ -996,16 +1005,18 @@ static irqreturn_t neo_intr(int irq, void *voidbrd) case UART_17158_TXRDY: /* - * TXRDY interrupt clears after reading ISR register for the UART channel. + * TXRDY interrupt clears after reading ISR register + * for the UART channel. */ /* * Yes, this is odd... * Why would I check EVERY possibility of type of * interrupt, when we know its TXRDY??? - * Becuz for some reason, even tho we got triggered for TXRDY, - * it seems to be occasionally wrong. Instead of TX, which - * it should be, I was getting things like RXDY too. Weird. + * Becuz for some reason, even tho we got triggered for + * TXRDY, it seems to be occasionally wrong. Instead of + * TX, which it should be, I was getting things like + * RXDY too. Weird. */ neo_parse_isr(brd, port); break; @@ -1020,8 +1031,8 @@ static irqreturn_t neo_intr(int irq, void *voidbrd) default: /* * The UART triggered us with a bogus interrupt type. - * It appears the Exar chip, when REALLY bogged down, will throw - * these once and awhile. + * It appears the Exar chip, when REALLY bogged down, + * will throw these once and awhile. * Its harmless, just ignore it and move on. */ break; @@ -1239,7 +1250,8 @@ static void neo_copy_data_from_uart_to_queue(struct channel_t *ch) } /* - * If our queue is full, we have no choice but to drop some data. + * If our queue is full, we have no choice but to drop some + * data. * The assumption is that HWFLOW or SWFLOW should have stopped * things way way before we got to this point. * @@ -1332,7 +1344,10 @@ static void neo_flush_uart_write(struct channel_t *ch) neo_pci_posting_flush(ch->ch_bd); for (i = 0; i < 10; i++) { - /* Check to see if the UART feels it completely flushed the FIFO. */ + /* + * Check to see if the UART feels it completely flushed the + * FIFO. + */ tmp = readb(&ch->ch_neo_uart->isr_fcr); if (tmp & 4) udelay(10); @@ -1361,7 +1376,10 @@ static void neo_flush_uart_read(struct channel_t *ch) neo_pci_posting_flush(ch->ch_bd); for (i = 0; i < 10; i++) { - /* Check to see if the UART feels it completely flushed the FIFO. */ + /* + * Check to see if the UART feels it completely flushed the + * FIFO. + */ tmp = readb(&ch->ch_neo_uart->isr_fcr); if (tmp & 2) udelay(10); @@ -1406,8 +1424,9 @@ static void neo_copy_data_from_queue_to_uart(struct channel_t *ch) ch->ch_cached_lsr &= ~(UART_LSR_THRE); /* - * If RTS Toggle mode is on, turn on RTS now if not already set, - * and make sure we get an event when the data transfer has completed. + * If RTS Toggle mode is on, turn on RTS now if not + * already set, and make sure we get an event when the + * data transfer has completed. */ if (ch->ch_digi.digi_flags & DIGI_RTS_TOGGLE) { if (!(ch->ch_mostat & UART_MCR_RTS)) { @@ -1417,8 +1436,9 @@ static void neo_copy_data_from_queue_to_uart(struct channel_t *ch) ch->ch_tun.un_flags |= (UN_EMPTY); } /* - * If DTR Toggle mode is on, turn on DTR now if not already set, - * and make sure we get an event when the data transfer has completed. + * If DTR Toggle mode is on, turn on DTR now if not + * already set, and make sure we get an event when the + * data transfer has completed. */ if (ch->ch_digi.digi_flags & DIGI_DTR_TOGGLE) { if (!(ch->ch_mostat & UART_MCR_DTR)) { @@ -1474,7 +1494,8 @@ static void neo_copy_data_from_queue_to_uart(struct channel_t *ch) /* * If RTS Toggle mode is on, turn on RTS now if not already set, - * and make sure we get an event when the data transfer has completed. + * and make sure we get an event when the data transfer has + * completed. */ if (ch->ch_digi.digi_flags & DIGI_RTS_TOGGLE) { if (!(ch->ch_mostat & UART_MCR_RTS)) { @@ -1486,7 +1507,8 @@ static void neo_copy_data_from_queue_to_uart(struct channel_t *ch) /* * If DTR Toggle mode is on, turn on DTR now if not already set, - * and make sure we get an event when the data transfer has completed. + * and make sure we get an event when the data transfer has + * completed. */ if (ch->ch_digi.digi_flags & DIGI_DTR_TOGGLE) { if (!(ch->ch_mostat & UART_MCR_DTR)) { @@ -1550,7 +1572,10 @@ static void neo_parse_modem(struct channel_t *ch, unsigned char signals) } } - /* Scrub off lower bits. They signify delta's, which I don't care about */ + /* + * Scrub off lower bits. They signify delta's, which I don't care + * about + */ msignals &= 0xf0; if (msignals & UART_MSR_DCD) -- 2.7.4