From 775011980bf8dd131da8e387a0fd854e9615c158 Mon Sep 17 00:00:00 2001 From: Heiko Thiery Date: Wed, 23 Feb 2022 09:10:29 +0100 Subject: [PATCH] ARM: imx: imx8mn-*-evk: use DM settings for PHY configuration With the correct settings described in the device-tree the PHY settings in the board init are no longer required. The values are taken from the linux device tree. The PHY latency settings are derived from the phy-mode property and the voltage seetings are done via the regulator. Suggested-by: Michael Walle Signed-off-by: Heiko Thiery Tested-by: Marek Vasut # 8MNANOD4-EVK Reviewed-by: Fabio Estevam --- arch/arm/dts/imx8mn-evk.dtsi | 6 ++++++ board/freescale/imx8mn_evk/imx8mn_evk.c | 16 ---------------- 2 files changed, 6 insertions(+), 16 deletions(-) diff --git a/arch/arm/dts/imx8mn-evk.dtsi b/arch/arm/dts/imx8mn-evk.dtsi index 416fadb..fc2c7f1 100644 --- a/arch/arm/dts/imx8mn-evk.dtsi +++ b/arch/arm/dts/imx8mn-evk.dtsi @@ -64,6 +64,12 @@ ethphy0: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0>; + vddio-supply = <&vddio>; + + vddio: vddio-regulator { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; }; }; }; diff --git a/board/freescale/imx8mn_evk/imx8mn_evk.c b/board/freescale/imx8mn_evk/imx8mn_evk.c index b24342f..e35d505 100644 --- a/board/freescale/imx8mn_evk/imx8mn_evk.c +++ b/board/freescale/imx8mn_evk/imx8mn_evk.c @@ -27,22 +27,6 @@ static void setup_fec(void) clrsetbits_le32(&gpr->gpr[1], 0x2000, 0); } -int board_phy_config(struct phy_device *phydev) -{ - /* enable rgmii rxc skew and phy mode select to RGMII copper */ - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); - - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); - - if (phydev->drv->config) - phydev->drv->config(phydev); - return 0; -} - int board_init(void) { setup_fec(); -- 2.7.4