From 7709d306418154780aac5a6947d300a705cccbb8 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Wed, 4 Nov 2020 19:55:13 -0800 Subject: [PATCH] Revert "[RISCV] Move some test cases from rv64i-single-softfloat.ll to a new rv64i-double-softfloat.ll. NFC" I failed to git add the new test file. This reverts commit 36072cc0a487fb5ad315d264064daa73d916469c. --- llvm/test/CodeGen/RISCV/rv64i-single-softfloat.ll | 59 +++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/llvm/test/CodeGen/RISCV/rv64i-single-softfloat.ll b/llvm/test/CodeGen/RISCV/rv64i-single-softfloat.ll index 1008f0c..5888fc3 100644 --- a/llvm/test/CodeGen/RISCV/rv64i-single-softfloat.ll +++ b/llvm/test/CodeGen/RISCV/rv64i-single-softfloat.ll @@ -739,10 +739,40 @@ entry: ret i32 %conv } +define i32 @fp64_to_ui32(double %a) nounwind { +; RV64I-LABEL: fp64_to_ui32: +; RV64I: # %bb.0: # %entry +; RV64I-NEXT: addi sp, sp, -16 +; RV64I-NEXT: sd ra, 8(sp) +; RV64I-NEXT: call __fixunsdfsi +; RV64I-NEXT: ld ra, 8(sp) +; RV64I-NEXT: addi sp, sp, 16 +; RV64I-NEXT: ret +entry: + %conv = fptoui double %a to i32 + ret i32 %conv +} + +define i32 @fp64_to_si32(double %a) nounwind { +; RV64I-LABEL: fp64_to_si32: +; RV64I: # %bb.0: # %entry +; RV64I-NEXT: addi sp, sp, -16 +; RV64I-NEXT: sd ra, 8(sp) +; RV64I-NEXT: call __fixdfsi +; RV64I-NEXT: ld ra, 8(sp) +; RV64I-NEXT: addi sp, sp, 16 +; RV64I-NEXT: ret +entry: + %conv = fptosi double %a to i32 + ret i32 %conv +} + declare i32 @llvm.experimental.constrained.fptoui.i32.f32(float, metadata) declare i32 @llvm.experimental.constrained.fptosi.i32.f32(float, metadata) +declare i32 @llvm.experimental.constrained.fptosi.i32.f64(double, metadata) +declare i32 @llvm.experimental.constrained.fptoui.i32.f64(double, metadata) define i32 @strict_fp32_to_ui32(float %a) nounwind strictfp { ; RV64I-LABEL: strict_fp32_to_ui32: @@ -771,3 +801,32 @@ entry: %conv = tail call i32 @llvm.experimental.constrained.fptosi.i32.f32(float %a, metadata !"fpexcept.strict") ret i32 %conv } + +define i32 @strict_fp64_to_ui32(double %a) nounwind strictfp { +; RV64I-LABEL: strict_fp64_to_ui32: +; RV64I: # %bb.0: # %entry +; RV64I-NEXT: addi sp, sp, -16 +; RV64I-NEXT: sd ra, 8(sp) +; RV64I-NEXT: call __fixunsdfsi +; RV64I-NEXT: ld ra, 8(sp) +; RV64I-NEXT: addi sp, sp, 16 +; RV64I-NEXT: ret +entry: + %conv = tail call i32 @llvm.experimental.constrained.fptoui.i32.f64(double %a, metadata !"fpexcept.strict") + ret i32 %conv +} + +define i32 @struct_fp64_to_si32(double %a) nounwind strictfp { +; RV64I-LABEL: struct_fp64_to_si32: +; RV64I: # %bb.0: # %entry +; RV64I-NEXT: addi sp, sp, -16 +; RV64I-NEXT: sd ra, 8(sp) +; RV64I-NEXT: call __fixdfsi +; RV64I-NEXT: ld ra, 8(sp) +; RV64I-NEXT: addi sp, sp, 16 +; RV64I-NEXT: ret +entry: + %conv = tail call i32 @llvm.experimental.constrained.fptosi.i32.f64(double %a, metadata !"fpexcept.strict") + ret i32 %conv +} + -- 2.7.4