From 77014a0ad36acf11b704ab20456259831a102308 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Wed, 30 Nov 2016 01:38:23 +0100 Subject: [PATCH] radeonsi: document a CP DMA bug that doesn't need a workaround yet MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit This one is easy to miss, because it's not documented in any internal doc. Reviewed-by: Nicolai Hähnle --- src/amd/common/sid.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/amd/common/sid.h b/src/amd/common/sid.h index 7f598ca..3b3983f 100644 --- a/src/amd/common/sid.h +++ b/src/amd/common/sid.h @@ -151,7 +151,11 @@ #define PKT3_COND_WRITE 0x45 #define PKT3_EVENT_WRITE 0x46 #define PKT3_EVENT_WRITE_EOP 0x47 -#define PKT3_EVENT_WRITE_EOS 0x48 +/* CP DMA bug: Any use of CP_DMA.DST_SEL=TC must be avoided when EOS packets + * are used. Use DST_SEL=MC instead. For prefetch, use SRC_SEL=TC and + * DST_SEL=MC. Only CIK chips are affected. + */ +/*#define PKT3_EVENT_WRITE_EOS 0x48*/ /* fix CP DMA before uncommenting */ #define PKT3_ONE_REG_WRITE 0x57 /* not on CIK */ #define PKT3_ACQUIRE_MEM 0x58 /* new for CIK */ #define PKT3_SET_CONFIG_REG 0x68 -- 2.7.4