From 760cad69266ea3a1b9d45694e95e8dc69d52307b Mon Sep 17 00:00:00 2001 From: Fangrui Song Date: Sun, 23 Jul 2023 15:06:33 -0700 Subject: [PATCH] ReleaseNotes: add lld/ELF notes --- lld/docs/ReleaseNotes.rst | 54 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/lld/docs/ReleaseNotes.rst b/lld/docs/ReleaseNotes.rst index 9435f23..0b2ff6e 100644 --- a/lld/docs/ReleaseNotes.rst +++ b/lld/docs/ReleaseNotes.rst @@ -26,10 +26,64 @@ Non-comprehensive list of changes in this release ELF Improvements ---------------- +* When ``--threads=`` is not specified, the number of concurrency is now capped to 16. + A large ``--thread=`` can harm performance, especially with some system + malloc implementations like glibc's. + (`D147493 `_) * ``--remap-inputs=`` and ``--remap-inputs-file=`` are added to remap input files. (`D148859 `_) +* ``--lto=`` is now available to support ``clang -funified-lto`` + (`D123805 `_) +* ``--lto-CGO[0-3]`` is now available to control ``CodeGenOpt::Level`` independent of the LTO optimization level. + (`D141970 `_) +* ``--check-dynamic-relocations=`` is now correct 32-bit targets when the addend is larger than 0x80000000. + (`D149347 `_) +* ``--print-memory-usage`` has been implemented for memory regions. + (`D150644 `_) +* ``SHF_MERGE``, ``--icf=``, and ``--build-id=fast`` have switched to 64-bit xxh3. + (`D154813 `_) +* Quoted output section names can now be used in linker scripts. + (`#60496 `_) +* ``MEMORY`` can now be used without a ``SECTIONS`` command. + (`D145132 `_) +* ``REVERSE`` can now be used in input section descriptions to reverse the order of input sections. + (`D145381 `_) +* Program header assignment can now be used within ``OVERLAY``. This functionality was accidentally lost in 2020. + (`D150445 `_) +* Operators ``^`` and ``^=`` can now be used in linker scripts. +* ``DT_AARCH64_MEMTAG_*`` dynamic tags are now supported. + (`D143769 `_) +* AArch32 port now supports BE-8 and BE-32 modes for big-endian. + (`D140201 `_) + (`D140202 `_) + (`D150870 `_) +* ``R_ARM_THM_ALU_ABS_G*`` relocations are now supported. + (`D153407 `_) +* ``.ARM.exidx`` sections may start at non-zero output section offset. + (`D148033 `_) +* Arm Cortex-M Security Extensions is now implemented. + (`D139092 `_) +* BTI landing pads are now added to PLT entries accessed by range extension thunks or relative vtables. + (`D148704 `_) + (`D153264 `_) +* AArch64 short range thunk has been implemented to mitigate the performance loss of a long range thunk. + (`D148701 `_) +* ``R_AVR_8_LO8/R_AVR_8_HI8/R_AVR_8_HLO8/R_AVR_LO8_LDI_GS/R_AVR_HI8_LDI_GS`` have been implemented. + (`D147100 `_) + (`D147364 `_) +* ``--no-power10-stubs`` now works for PowerPC64. +* ``DT_PPC64_OPT`` is now supported; + (`D150631 `_) * ``PT_RISCV_ATTRIBUTES`` is added to include the SHT_RISCV_ATTRIBUTES section. (`D152065 `_) +* ``R_RISCV_PLT32`` is added to support C++ relative vtables. + (`D143115 `_) +* RISC-V global pointer relaxation has been implemented. Specify ``--relax-gp`` to enable the linker relaxation. + (`D143673 `_) +* The symbol value of ``foo`` is correctly handled when ``--wrap=foo`` and RISC-V linker relaxation are used. + (`D151768 `_) +* x86-64 large data sections are now placed away from code sections to alleviate relocation overflow pressure. + (`D150510 `_) Breaking changes ---------------- -- 2.7.4