From 751a554f25a9d8e92b378c870d0fb876db72d54a Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Tue, 28 Apr 2020 21:25:21 +0100 Subject: [PATCH] [InstCombine] Add PR45715 test case --- llvm/test/Transforms/InstCombine/or-concat.ll | 36 +++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 llvm/test/Transforms/InstCombine/or-concat.ll diff --git a/llvm/test/Transforms/InstCombine/or-concat.ll b/llvm/test/Transforms/InstCombine/or-concat.ll new file mode 100644 index 0000000..1331a19 --- /dev/null +++ b/llvm/test/Transforms/InstCombine/or-concat.ll @@ -0,0 +1,36 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt -S -instcombine < %s | FileCheck %s + +; +; Tests for combining concat-able ops: +; or(zext(OP(x)), shl(zext(OP(y)),bw/2)) +; --> +; OP(or(zext(x), shl(zext(y),bw/2))) +; + +define i64 @PR45715(i64 %a0) { +; CHECK-LABEL: @PR45715( +; CHECK-NEXT: [[TMP1:%.*]] = lshr i64 [[A0:%.*]], 32 +; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32 +; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[A0]] to i32 +; CHECK-NEXT: [[TMP4:%.*]] = tail call i32 @llvm.bswap.i32(i32 [[TMP2]]) +; CHECK-NEXT: [[TMP5:%.*]] = tail call i32 @llvm.bswap.i32(i32 [[TMP3]]) +; CHECK-NEXT: [[TMP6:%.*]] = zext i32 [[TMP4]] to i64 +; CHECK-NEXT: [[TMP7:%.*]] = zext i32 [[TMP5]] to i64 +; CHECK-NEXT: [[TMP8:%.*]] = shl nuw i64 [[TMP7]], 32 +; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP8]], [[TMP6]] +; CHECK-NEXT: ret i64 [[TMP9]] +; + %1 = lshr i64 %a0, 32 + %2 = trunc i64 %1 to i32 + %3 = trunc i64 %a0 to i32 + %4 = tail call i32 @llvm.bswap.i32(i32 %2) + %5 = tail call i32 @llvm.bswap.i32(i32 %3) + %6 = zext i32 %4 to i64 + %7 = zext i32 %5 to i64 + %8 = shl nuw i64 %7, 32 + %9 = or i64 %6, %8 + ret i64 %9 +} + +declare i32 @llvm.bswap.i32(i32) -- 2.7.4