From 73f24d2f41e59f3042aa538ac31da3dc9adb7f94 Mon Sep 17 00:00:00 2001
From: Yangyu Chen <cyy@cyyself.name>
Date: Tue, 30 Jul 2024 00:28:10 +0000
Subject: [PATCH] riscv: add SpacemiT SoC family Kconfig support

The first SoC in the SpacemiT series is K1, which contains 8 RISC-V
cores with RISC-V Vector v1.0 support.

Link: https://www.spacemit.com/en/spacemit-key-stone-2/
Signed-off-by: Yangyu Chen <cyy@cyyself.name>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Yixun Lan <dlan@gentoo.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Matthias Brugger <matthias.bgg@kernel.org>
[ m.wilczynski: ported from
https://lore.kernel.org/all/20240730-k1-01-basic-dt-v5-0-98263aae83be@gentoo.org/
]
Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>

Change-Id: I1c5bfca97a10b65dd2ee32839108db4e7948321c
---
 arch/riscv/Kconfig.socs | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 30fd6a512828..a7db7bff727e 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -22,6 +22,11 @@ config SOC_SIFIVE
 	help
 	  This enables support for SiFive SoC platform hardware.
 
+config ARCH_SPACEMIT
+	bool "SpacemiT SoCs"
+	help
+	  This enables support for SpacemiT SoC platform hardware.
+
 config ARCH_STARFIVE
 	def_bool SOC_STARFIVE
 
-- 
2.34.1