From 73e0ad8220554c7b81380222c694cf5ba68f826f Mon Sep 17 00:00:00 2001 From: Krzysztof Parzyszek Date: Fri, 9 Sep 2016 21:45:00 +0000 Subject: [PATCH] [Hexagon] Fix disassembler crash after r279255 When p0 was added as an explicit operand to the duplex subinstructions, the disassembler was not updated to reflect this. llvm-svn: 281104 --- llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp | 3 +++ llvm/test/MC/Hexagon/dis-duplex-p0.s | 7 +++++++ 2 files changed, 10 insertions(+) create mode 100644 llvm/test/MC/Hexagon/dis-duplex-p0.s diff --git a/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp b/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp index 7bc08ec..e020351 100644 --- a/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp +++ b/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp @@ -1501,6 +1501,9 @@ void HexagonDisassembler::addSubinstOperands(MCInst *MI, unsigned opcode, operand = getRegFromSubinstEncoding(inst & 0xf); Op = MCOperand::createReg(operand); MI->addOperand(Op); + if (opcode == Hexagon::V4_SA1_setin1) + break; + MI->addOperand(MCOperand::createReg(Hexagon::P0)); break; case Hexagon::V4_SA1_cmpeqi: // Rs 7-4, u 1-0 diff --git a/llvm/test/MC/Hexagon/dis-duplex-p0.s b/llvm/test/MC/Hexagon/dis-duplex-p0.s new file mode 100644 index 0000000..dc6a126 --- /dev/null +++ b/llvm/test/MC/Hexagon/dis-duplex-p0.s @@ -0,0 +1,7 @@ +// RUN: llvm-mc -arch=hexagon -filetype=obj -o - %s | llvm-objdump -d - | FileCheck %s +// REQUIRES: asserts + .text +// CHECK: { r7 = #-1; r7 = #-1 } + .long 0x3a373a27 +// CHECK: { if (!p0.new) r7 = #0; if (p0.new) r7 = #0 } + .long 0x3a573a47 -- 2.7.4