From 7293f9895e10869d0c2dc39c4b2155592a83004d Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Thu, 28 Jan 2016 20:53:35 +0000 Subject: [PATCH] AMDGPU: Set DX10Clamp bit llvm-svn: 259088 --- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 5 ++--- llvm/test/CodeGen/AMDGPU/hsa-fp-mode.ll | 10 ++++++++++ 2 files changed, 12 insertions(+), 3 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/hsa-fp-mode.ll diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp index 0e911c4..913f3f5 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp @@ -476,11 +476,10 @@ void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &ProgInfo, // register. ProgInfo.FloatMode = getFPMode(MF); - // XXX: Not quite sure what this does, but sc seems to unset this. ProgInfo.IEEEMode = 0; - // Do not clamp NAN to 0. - ProgInfo.DX10Clamp = 0; + // Make clamp modifier on NaN input returns 0. + ProgInfo.DX10Clamp = 1; const MachineFrameInfo *FrameInfo = MF.getFrameInfo(); ProgInfo.ScratchSize = FrameInfo->estimateStackSize(MF); diff --git a/llvm/test/CodeGen/AMDGPU/hsa-fp-mode.ll b/llvm/test/CodeGen/AMDGPU/hsa-fp-mode.ll new file mode 100644 index 0000000..cab8651 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/hsa-fp-mode.ll @@ -0,0 +1,10 @@ +; RUN: llc -march=amdgcn -mcpu=kaveri -mtriple=amdgcn-unknown-amdhsa -mattr=-fp32-denormals,+fp64-denormals < %s | FileCheck -check-prefix=FP64-DENORMAL -check-prefix=COMMON %s + +; COMMON-LABEL: {{^}}test_kernel: +; COMMON-DENORMAL: compute_pgm_rsrc1_float_mode = compute_pgm_rsrc1_float_mode = 192 +; COMMON-DENORMAL: compute_pgm_rsrc1_dx10_clamp = 1 +define void @test_kernel(float addrspace(1)* %out0, double addrspace(1)* %out1) nounwind { + store float 0.0, float addrspace(1)* %out0 + store double 0.0, double addrspace(1)* %out1 + ret void +} -- 2.7.4