From 723733575b90089c51adefde41875310052031c2 Mon Sep 17 00:00:00 2001 From: Bastian Koppelmann Date: Tue, 16 Feb 2016 22:33:13 +0100 Subject: [PATCH] target-tricore: fix save_context_upper using env->PSW If the cached bits for C, V, SV, AV, or SAV were set, they would not be saved during the context save since env->PSW was stored instead of properly reading them using psw_read(). Reviewed-by: Richard Henderson Signed-off-by: Bastian Koppelmann --- target-tricore/op_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-tricore/op_helper.c b/target-tricore/op_helper.c index 3aa6326edd..796fe67cc8 100644 --- a/target-tricore/op_helper.c +++ b/target-tricore/op_helper.c @@ -2279,7 +2279,7 @@ static bool cdc_zero(target_ulong *psw) static void save_context_upper(CPUTriCoreState *env, int ea) { cpu_stl_data(env, ea, env->PCXI); - cpu_stl_data(env, ea+4, env->PSW); + cpu_stl_data(env, ea+4, psw_read(env)); cpu_stl_data(env, ea+8, env->gpr_a[10]); cpu_stl_data(env, ea+12, env->gpr_a[11]); cpu_stl_data(env, ea+16, env->gpr_d[8]); -- 2.34.1