From 72283404c2bc82bd7f7196a58f0e14b948e77173 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 30 Dec 2022 14:56:41 +0100 Subject: [PATCH] dt-bindings: pinctrl: qcom,sm6350-tlmm: correct pins pattern SM6350 TLMM pin controller has GPIOs 0-155. Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20221230135645.56401-5-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml index b099649..39f3ec5 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml @@ -68,7 +68,7 @@ $defs: subnode. items: oneOf: - - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-7])$" + - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-5])$" - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ] minItems: 1 maxItems: 36 -- 2.7.4