From 71ddaca2e23bf5c7143f71f2ac485732b60e3124 Mon Sep 17 00:00:00 2001 From: Faith Ekstrand Date: Thu, 17 Aug 2023 15:46:50 -0500 Subject: [PATCH] nir: Drop nir_instr_rewrite_src_ssa() Reviewed-by: Alyssa Rosenzweig Part-of: --- src/amd/common/ac_nir_lower_ps.c | 4 ++-- src/compiler/nir/nir.h | 9 --------- src/gallium/drivers/zink/zink_compiler.c | 10 +++++----- 3 files changed, 7 insertions(+), 16 deletions(-) diff --git a/src/amd/common/ac_nir_lower_ps.c b/src/amd/common/ac_nir_lower_ps.c index f80fe20..5949312 100644 --- a/src/amd/common/ac_nir_lower_ps.c +++ b/src/amd/common/ac_nir_lower_ps.c @@ -705,8 +705,8 @@ emit_ps_dual_src_blend_swizzle(nir_builder *b, lower_ps_state *s, unsigned first arg1_vec[i] = arg1; } - nir_instr_rewrite_src_ssa(&mrt0_exp->instr, &mrt0_exp->src[0], nir_vec(b, arg0_vec, 4)); - nir_instr_rewrite_src_ssa(&mrt1_exp->instr, &mrt1_exp->src[0], nir_vec(b, arg1_vec, 4)); + nir_src_rewrite(&mrt0_exp->src[0], nir_vec(b, arg0_vec, 4)); + nir_src_rewrite(&mrt1_exp->src[0], nir_vec(b, arg1_vec, 4)); nir_intrinsic_set_write_mask(mrt0_exp, write_mask); nir_intrinsic_set_write_mask(mrt1_exp, write_mask); diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 5413c9d..30c8e12 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@ -4410,15 +4410,6 @@ nir_src_rewrite(nir_src *src, nir_def *new_ssa) list_addtail(&src->use_link, &new_ssa->uses); } -static inline void -nir_instr_rewrite_src_ssa(ASSERTED nir_instr *instr, - nir_src *src, nir_def *new_ssa) -{ - assert(!src->is_if); - assert(src->parent_instr == instr); - nir_src_rewrite(src, new_ssa); -} - void nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src); /** Initialize a nir_src diff --git a/src/gallium/drivers/zink/zink_compiler.c b/src/gallium/drivers/zink/zink_compiler.c index e7d4fe1..1e021b7 100644 --- a/src/gallium/drivers/zink/zink_compiler.c +++ b/src/gallium/drivers/zink/zink_compiler.c @@ -2026,7 +2026,7 @@ rewrite_bo_access_instr(nir_builder *b, nir_instr *instr, void *data) case nir_intrinsic_ssbo_atomic_swap: { /* convert offset to uintN_t[idx] */ nir_def *offset = nir_udiv_imm(b, intr->src[1].ssa, intr->def.bit_size / 8); - nir_instr_rewrite_src_ssa(instr, &intr->src[1], offset); + nir_src_rewrite(&intr->src[1], offset); return true; } case nir_intrinsic_load_ssbo: @@ -2039,7 +2039,7 @@ rewrite_bo_access_instr(nir_builder *b, nir_instr *instr, void *data) nir_intrinsic_align_offset(intr) % 8 != 0; force_2x32 |= intr->def.bit_size == 64 && !has_int64; nir_def *offset = nir_udiv_imm(b, intr->src[1].ssa, (force_2x32 ? 32 : intr->def.bit_size) / 8); - nir_instr_rewrite_src_ssa(instr, &intr->src[1], offset); + nir_src_rewrite(&intr->src[1], offset); /* if 64bit isn't supported, 64bit loads definitely aren't supported, so rewrite as 2x32 with cast and pray */ if (force_2x32) { /* this is always scalarized */ @@ -2064,7 +2064,7 @@ rewrite_bo_access_instr(nir_builder *b, nir_instr *instr, void *data) b->cursor = nir_before_instr(instr); bool force_2x32 = intr->def.bit_size == 64 && !has_int64; nir_def *offset = nir_udiv_imm(b, intr->src[0].ssa, (force_2x32 ? 32 : intr->def.bit_size) / 8); - nir_instr_rewrite_src_ssa(instr, &intr->src[0], offset); + nir_src_rewrite(&intr->src[0], offset); /* if 64bit isn't supported, 64bit loads definitely aren't supported, so rewrite as 2x32 with cast and pray */ if (force_2x32) { /* this is always scalarized */ @@ -2084,7 +2084,7 @@ rewrite_bo_access_instr(nir_builder *b, nir_instr *instr, void *data) b->cursor = nir_before_instr(instr); bool force_2x32 = nir_src_bit_size(intr->src[0]) == 64 && !has_int64; nir_def *offset = nir_udiv_imm(b, intr->src[2].ssa, (force_2x32 ? 32 : nir_src_bit_size(intr->src[0])) / 8); - nir_instr_rewrite_src_ssa(instr, &intr->src[2], offset); + nir_src_rewrite(&intr->src[2], offset); /* if 64bit isn't supported, 64bit loads definitely aren't supported, so rewrite as 2x32 with cast and pray */ if (force_2x32) { /* this is always scalarized */ @@ -2100,7 +2100,7 @@ rewrite_bo_access_instr(nir_builder *b, nir_instr *instr, void *data) b->cursor = nir_before_instr(instr); bool force_2x32 = nir_src_bit_size(intr->src[0]) == 64 && !has_int64; nir_def *offset = nir_udiv_imm(b, intr->src[1].ssa, (force_2x32 ? 32 : nir_src_bit_size(intr->src[0])) / 8); - nir_instr_rewrite_src_ssa(instr, &intr->src[1], offset); + nir_src_rewrite(&intr->src[1], offset); /* if 64bit isn't supported, 64bit loads definitely aren't supported, so rewrite as 2x32 with cast and pray */ if (nir_src_bit_size(intr->src[0]) == 64 && !has_int64) { /* this is always scalarized */ -- 2.7.4