From 718a0cf49f88ff456582366db45c31f881561ebf Mon Sep 17 00:00:00 2001 From: Timothy Arceri Date: Fri, 4 Nov 2016 13:37:21 +1100 Subject: [PATCH] i965: move compiled_once flag to brw_program This allows us to delete brw_shader and removes the last use of gl_linked_shader in the codegen paths. Reviewed-by: Eric Anholt --- src/mesa/drivers/dri/i965/brw_context.h | 8 ++------ src/mesa/drivers/dri/i965/brw_cs.c | 10 +++------- src/mesa/drivers/dri/i965/brw_gs.c | 8 +++----- src/mesa/drivers/dri/i965/brw_link.cpp | 8 +++----- src/mesa/drivers/dri/i965/brw_tcs.c | 10 ++++------ src/mesa/drivers/dri/i965/brw_tes.c | 7 ++----- src/mesa/drivers/dri/i965/brw_vs.c | 10 +++------- src/mesa/drivers/dri/i965/brw_wm.c | 10 +++------- 8 files changed, 23 insertions(+), 48 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 1ba9792..3146baf 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -333,6 +333,8 @@ struct brw_state_flags { struct brw_program { struct gl_program program; GLuint id; + + bool compiled_once; }; @@ -350,12 +352,6 @@ struct gen4_fragment_program { }; -struct brw_shader { - struct gl_linked_shader base; - - bool compiled_once; -}; - /** * Bitmask indicating which fragment shader inputs represent varyings (and * hence have to be delivered to the fragment shader by the SF/SBE stage). diff --git a/src/mesa/drivers/dri/i965/brw_cs.c b/src/mesa/drivers/dri/i965/brw_cs.c index 4516f1f..d039db9 100644 --- a/src/mesa/drivers/dri/i965/brw_cs.c +++ b/src/mesa/drivers/dri/i965/brw_cs.c @@ -66,10 +66,6 @@ brw_codegen_cs_prog(struct brw_context *brw, bool start_busy = false; double start_time = 0; - struct brw_shader *cs = - (struct brw_shader *) prog->_LinkedShaders[MESA_SHADER_COMPUTE]; - assert (cs); - memset(&prog_data, 0, sizeof(prog_data)); if (prog->Comp.SharedSize > 64 * 1024) { @@ -134,11 +130,11 @@ brw_codegen_cs_prog(struct brw_context *brw, return false; } - if (unlikely(brw->perf_debug) && cs) { - if (cs->compiled_once) { + if (unlikely(brw->perf_debug)) { + if (cp->compiled_once) { _mesa_problem(&brw->ctx, "CS programs shouldn't need recompiles"); } - cs->compiled_once = true; + cp->compiled_once = true; if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) { perf_debug("CS compile took %.03f ms and stalled the GPU\n", diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c index a11ef73..c346209 100644 --- a/src/mesa/drivers/dri/i965/brw_gs.c +++ b/src/mesa/drivers/dri/i965/brw_gs.c @@ -116,8 +116,6 @@ brw_codegen_gs_prog(struct brw_context *brw, * padding around uniform values below vec4 size, so the worst case is that * every uniform is a float which gets padded to the size of a vec4. */ - struct gl_linked_shader *gs = prog->_LinkedShaders[MESA_SHADER_GEOMETRY]; - struct brw_shader *bgs = (struct brw_shader *) gs; int param_count = gp->program.nir->num_uniforms / 4; prog_data.base.base.param = @@ -154,7 +152,7 @@ brw_codegen_gs_prog(struct brw_context *brw, char *error_str; const unsigned *program = brw_compile_gs(brw->screen->compiler, brw, mem_ctx, key, - &prog_data, gs->Program->nir, prog, + &prog_data, gp->program.nir, prog, st_index, &program_size, &error_str); if (program == NULL) { ralloc_strcat(&prog->data->InfoLog, error_str); @@ -165,14 +163,14 @@ brw_codegen_gs_prog(struct brw_context *brw, } if (unlikely(brw->perf_debug)) { - if (bgs->compiled_once) { + if (gp->compiled_once) { brw_gs_debug_recompile(brw, prog, key); } if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) { perf_debug("GS compile took %.03f ms and stalled the GPU\n", (get_time() - start_time) * 1000); } - bgs->compiled_once = true; + gp->compiled_once = true; } /* Scratch space is used for register spilling */ diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp b/src/mesa/drivers/dri/i965/brw_link.cpp index 60eb8dc..902a693 100644 --- a/src/mesa/drivers/dri/i965/brw_link.cpp +++ b/src/mesa/drivers/dri/i965/brw_link.cpp @@ -177,14 +177,12 @@ process_glsl_ir(struct brw_context *brw, extern "C" struct gl_linked_shader * brw_new_shader(gl_shader_stage stage) { - struct brw_shader *shader; - - shader = rzalloc(NULL, struct brw_shader); + struct gl_linked_shader *shader = rzalloc(NULL, struct gl_linked_shader); if (shader) { - shader->base.Stage = stage; + shader->Stage = stage; } - return &shader->base; + return shader; } static void diff --git a/src/mesa/drivers/dri/i965/brw_tcs.c b/src/mesa/drivers/dri/i965/brw_tcs.c index 76cd0a5..0cfa1a6 100644 --- a/src/mesa/drivers/dri/i965/brw_tcs.c +++ b/src/mesa/drivers/dri/i965/brw_tcs.c @@ -277,15 +277,13 @@ brw_codegen_tcs_prog(struct brw_context *brw, } if (unlikely(brw->perf_debug)) { - struct gl_linked_shader *tcs = shader_prog ? - shader_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL] : NULL; - struct brw_shader *btcs = (struct brw_shader *) tcs; - if (btcs) { - if (btcs->compiled_once) { + if (tcp) { + if (tcp->compiled_once) { brw_tcs_debug_recompile(brw, shader_prog, key); } - btcs->compiled_once = true; + tcp->compiled_once = true; } + if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) { perf_debug("TCS compile took %.03f ms and stalled the GPU\n", (get_time() - start_time) * 1000); diff --git a/src/mesa/drivers/dri/i965/brw_tes.c b/src/mesa/drivers/dri/i965/brw_tes.c index d047c93..e0b7c89 100644 --- a/src/mesa/drivers/dri/i965/brw_tes.c +++ b/src/mesa/drivers/dri/i965/brw_tes.c @@ -195,17 +195,14 @@ brw_codegen_tes_prog(struct brw_context *brw, } if (unlikely(brw->perf_debug)) { - struct gl_linked_shader *tes = - shader_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL]; - struct brw_shader *btes = (struct brw_shader *) tes; - if (btes->compiled_once) { + if (tep->compiled_once) { brw_tes_debug_recompile(brw, shader_prog, key); } if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) { perf_debug("TES compile took %.03f ms and stalled the GPU\n", (get_time() - start_time) * 1000); } - btes->compiled_once = true; + tep->compiled_once = true; } /* Scratch space is used for register spilling */ diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c index 9a1f934..8729d3a 100644 --- a/src/mesa/drivers/dri/i965/brw_vs.c +++ b/src/mesa/drivers/dri/i965/brw_vs.c @@ -97,13 +97,9 @@ brw_codegen_vs_prog(struct brw_context *brw, struct brw_vs_prog_data prog_data; struct brw_stage_prog_data *stage_prog_data = &prog_data.base.base; void *mem_ctx; - struct brw_shader *vs = NULL; bool start_busy = false; double start_time = 0; - if (prog) - vs = (struct brw_shader *) prog->_LinkedShaders[MESA_SHADER_VERTEX]; - memset(&prog_data, 0, sizeof(prog_data)); /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */ @@ -202,15 +198,15 @@ brw_codegen_vs_prog(struct brw_context *brw, return false; } - if (unlikely(brw->perf_debug) && vs) { - if (vs->compiled_once) { + if (unlikely(brw->perf_debug)) { + if (vp->compiled_once) { brw_vs_debug_recompile(brw, prog, key); } if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) { perf_debug("VS compile took %.03f ms and stalled the GPU\n", (get_time() - start_time) * 1000); } - vs->compiled_once = true; + vp->compiled_once = true; } /* Scratch space is used for register spilling */ diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index a3a0fd24..08b8b30 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -85,14 +85,10 @@ brw_codegen_wm_prog(struct brw_context *brw, void *mem_ctx = ralloc_context(NULL); struct brw_wm_prog_data prog_data; const GLuint *program; - struct brw_shader *fs = NULL; GLuint program_size; bool start_busy = false; double start_time = 0; - if (prog) - fs = (struct brw_shader *)prog->_LinkedShaders[MESA_SHADER_FRAGMENT]; - memset(&prog_data, 0, sizeof(prog_data)); /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */ @@ -161,10 +157,10 @@ brw_codegen_wm_prog(struct brw_context *brw, return false; } - if (unlikely(brw->perf_debug) && fs) { - if (fs->compiled_once) + if (unlikely(brw->perf_debug)) { + if (fp->compiled_once) brw_wm_debug_recompile(brw, prog, key); - fs->compiled_once = true; + fp->compiled_once = true; if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) { perf_debug("FS compile took %.03f ms and stalled the GPU\n", -- 2.7.4