From 71707e5c3bb7728e181839efa05ca26a0b41ab30 Mon Sep 17 00:00:00 2001 From: yroux Date: Tue, 13 Jan 2015 08:10:04 +0000 Subject: [PATCH] 2015-01-13 Michael Collison Backport from trunk r216267, r216547, r216548, r217072, r217192, r217405, r217406, r217768. 2014-11-19 Renlin Li * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_FP_FAST, __ARM_FEATURE_FMA, __ARM_FP, __ARM_FEATURE_NUMERIC_MAXMIN, __ARM_NEON_FP. 2014-11-12 Tejas Belagod * Makefile.in (TEXI_GCC_FILES): Remove arm-acle-intrinsics.texi, arm-neon-intrinsics.texi, aarch64-acle-intrinsics.texi. * doc/aarch64-acle-intrinsics.texi: Remove. * doc/arm-acle-intrinsics.texi: Remove. * doc/arm-neon-intrinsics.texi: Remove. * doc/extend.texi: Consolidate sections AArch64 intrinsics, ARM NEON Intrinsics, ARM ACLE Intrinsics into one ARM C Language Extension section. Add references to public ACLE specification. 2014-11-06 Renlin Li * config/aarch64/aarch64.c (aarch64_architecture_version): New. (processor): New architecture_version field. (aarch64_override_options): Initialize aarch64_architecture_version. * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_ARCH, __ARM_ARCH_PROFILE, aarch64_arch_name macro. 2014-11-04 Ramana Radhakrishnan * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Fix typo in definition of __ARM_FEATURE_IDIV. 2014-10-22 Jiong Wang * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Add missing '\'. 2014-10-22 Renlin Li * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_FEATURE_IDIV__. 2014-10-15 Renlin Li * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_BIG_ENDIAN, __ARM_SIZEOF_MINIMAL_ENUM. Add __ARM_64BIT_STATE, __ARM_ARCH_ISA_A64, __ARM_FEATURE_CLZ, __ARM_FEATURE_IDIV, __ARM_FEATURE_UNALIGNED, __ARM_PCS_AAPCS64, __ARM_SIZEOF_WCHAR_T. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@219518 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog.linaro | 49 ++++++++++++++++++++++++++++++++++++++++++++ gcc/Makefile.in | 3 +-- gcc/config/aarch64/aarch64.c | 17 ++++++++++----- gcc/config/aarch64/aarch64.h | 45 ++++++++++++++++++++++++++++++++++------ gcc/config/arm/arm.h | 5 ++++- gcc/doc/extend.texi | 36 +++++++++++++++++--------------- 6 files changed, 125 insertions(+), 30 deletions(-) diff --git a/gcc/ChangeLog.linaro b/gcc/ChangeLog.linaro index 4727415..f6bace0 100644 --- a/gcc/ChangeLog.linaro +++ b/gcc/ChangeLog.linaro @@ -1,5 +1,54 @@ 2015-01-13 Michael Collison + Backport from trunk r216267, r216547, r216548, r217072, r217192, r217405, + r217406, r217768. + 2014-11-19 Renlin Li + + * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_FP_FAST, + __ARM_FEATURE_FMA, __ARM_FP, __ARM_FEATURE_NUMERIC_MAXMIN, __ARM_NEON_FP. + + 2014-11-12 Tejas Belagod + + * Makefile.in (TEXI_GCC_FILES): Remove arm-acle-intrinsics.texi, + arm-neon-intrinsics.texi, aarch64-acle-intrinsics.texi. + * doc/aarch64-acle-intrinsics.texi: Remove. + * doc/arm-acle-intrinsics.texi: Remove. + * doc/arm-neon-intrinsics.texi: Remove. + * doc/extend.texi: Consolidate sections AArch64 intrinsics, + ARM NEON Intrinsics, ARM ACLE Intrinsics into one ARM C Language + Extension section. Add references to public ACLE specification. + + 2014-11-06 Renlin Li + + * config/aarch64/aarch64.c (aarch64_architecture_version): New. + (processor): New architecture_version field. + (aarch64_override_options): Initialize aarch64_architecture_version. + * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_ARCH, + __ARM_ARCH_PROFILE, aarch64_arch_name macro. + + 2014-11-04 Ramana Radhakrishnan + + * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Fix typo in definition + of __ARM_FEATURE_IDIV. + + 2014-10-22 Jiong Wang + + * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Add missing '\'. + + 2014-10-22 Renlin Li + + * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define + __ARM_FEATURE_IDIV__. + + 2014-10-15 Renlin Li + + * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define + __ARM_BIG_ENDIAN, __ARM_SIZEOF_MINIMAL_ENUM. Add __ARM_64BIT_STATE, + __ARM_ARCH_ISA_A64, __ARM_FEATURE_CLZ, __ARM_FEATURE_IDIV, + __ARM_FEATURE_UNALIGNED, __ARM_PCS_AAPCS64, __ARM_SIZEOF_WCHAR_T. + +2015-01-13 Michael Collison + Backport from trunk r211789, r211790, r211791, r211792, r211793, r211794, r211795, r211796, r211797. 2014-06-18 Charles Baylis diff --git a/gcc/Makefile.in b/gcc/Makefile.in index 678f5df..ce80aa2 100644 --- a/gcc/Makefile.in +++ b/gcc/Makefile.in @@ -2803,8 +2803,7 @@ TEXI_GCC_FILES = gcc.texi gcc-common.texi gcc-vers.texi frontends.texi \ gcov.texi trouble.texi bugreport.texi service.texi \ contribute.texi compat.texi funding.texi gnu.texi gpl_v3.texi \ fdl.texi contrib.texi cppenv.texi cppopts.texi avr-mmcu.texi \ - implement-c.texi implement-cxx.texi arm-neon-intrinsics.texi \ - arm-acle-intrinsics.texi aarch64-acle-intrinsics.texi + implement-c.texi implement-cxx.texi # we explicitly use $(srcdir)/doc/tm.texi here to avoid confusion with # the generated tm.texi; the latter might have a more recent timestamp, diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 11d981c..683d317 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -141,6 +141,9 @@ static bool aarch64_vectorize_vec_perm_const_ok (enum machine_mode vmode, const unsigned char *sel); static int aarch64_address_cost (rtx, enum machine_mode, addr_space_t, bool); +/* Major revision number of the ARM Architecture implemented by the target. */ +unsigned aarch64_architecture_version; + /* The processor for which instructions should be scheduled. */ enum aarch64_processor aarch64_tune = cortexa53; @@ -335,6 +338,7 @@ struct processor const char *const name; enum aarch64_processor core; const char *arch; + unsigned architecture_version; const unsigned long flags; const struct tune_params *const tune; }; @@ -343,21 +347,23 @@ struct processor static const struct processor all_cores[] = { #define AARCH64_CORE(NAME, X, IDENT, ARCH, FLAGS, COSTS) \ - {NAME, IDENT, #ARCH, FLAGS | AARCH64_FL_FOR_ARCH##ARCH, &COSTS##_tunings}, + {NAME, IDENT, #ARCH, ARCH,\ + FLAGS | AARCH64_FL_FOR_ARCH##ARCH, &COSTS##_tunings}, #include "aarch64-cores.def" #undef AARCH64_CORE - {"generic", cortexa53, "8", AARCH64_FL_FPSIMD | AARCH64_FL_FOR_ARCH8, &generic_tunings}, - {NULL, aarch64_none, NULL, 0, NULL} + {"generic", cortexa53, "8", 8,\ + AARCH64_FL_FPSIMD | AARCH64_FL_FOR_ARCH8, &generic_tunings}, + {NULL, aarch64_none, NULL, 0, 0, NULL} }; /* Architectures implementing AArch64. */ static const struct processor all_architectures[] = { #define AARCH64_ARCH(NAME, CORE, ARCH, FLAGS) \ - {NAME, CORE, #ARCH, FLAGS, NULL}, + {NAME, CORE, #ARCH, ARCH, FLAGS, NULL}, #include "aarch64-arches.def" #undef AARCH64_ARCH - {NULL, aarch64_none, NULL, 0, NULL} + {NULL, aarch64_none, NULL, 0, 0, NULL} }; /* Target specification. These are populated as commandline arguments @@ -6462,6 +6468,7 @@ aarch64_override_options (void) aarch64_tune_flags = selected_tune->flags; aarch64_tune = selected_tune->core; aarch64_tune_params = selected_tune->tune; + aarch64_architecture_version = selected_cpu->architecture_version; if (aarch64_fix_a53_err835769 == 2) { diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index a00cd40..7fb40b0 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -26,16 +26,47 @@ #define TARGET_CPU_CPP_BUILTINS() \ do \ { \ - builtin_define ("__aarch64__"); \ + builtin_define ("__aarch64__"); \ + builtin_define ("__ARM_64BIT_STATE"); \ + builtin_define_with_int_value \ + ("__ARM_ARCH", aarch64_architecture_version); \ + cpp_define_formatted \ + (parse_in, "__ARM_ARCH_%dA", aarch64_architecture_version); \ + builtin_define ("__ARM_ARCH_ISA_A64"); \ + builtin_define_with_int_value \ + ("__ARM_ARCH_PROFILE", 'A'); \ + builtin_define ("__ARM_FEATURE_CLZ"); \ + builtin_define ("__ARM_FEATURE_IDIV"); \ + builtin_define ("__ARM_FEATURE_UNALIGNED"); \ + if (flag_unsafe_math_optimizations) \ + builtin_define ("__ARM_FP_FAST"); \ + builtin_define ("__ARM_PCS_AAPCS64"); \ + builtin_define_with_int_value \ + ("__ARM_SIZEOF_WCHAR_T", WCHAR_TYPE_SIZE / 8); \ + builtin_define_with_int_value \ + ("__ARM_SIZEOF_MINIMAL_ENUM", \ + flag_short_enums? 1 : 4); \ if (TARGET_BIG_END) \ - builtin_define ("__AARCH64EB__"); \ + { \ + builtin_define ("__AARCH64EB__"); \ + builtin_define ("__ARM_BIG_ENDIAN"); \ + } \ else \ builtin_define ("__AARCH64EL__"); \ \ - if (TARGET_SIMD) \ - builtin_define ("__ARM_NEON"); \ - \ - if (TARGET_CRC32) \ + if (TARGET_FLOAT) \ + { \ + builtin_define ("__ARM_FEATURE_FMA"); \ + builtin_define_with_int_value ("__ARM_FP", 0x0C); \ + } \ + if (TARGET_SIMD) \ + { \ + builtin_define ("__ARM_FEATURE_NUMERIC_MAXMIN"); \ + builtin_define ("__ARM_NEON"); \ + builtin_define_with_int_value ("__ARM_NEON_FP", 0x0C);\ + } \ + \ + if (TARGET_CRC32) \ builtin_define ("__ARM_FEATURE_CRC32"); \ \ switch (aarch64_cmodel) \ @@ -158,6 +189,8 @@ #define PCC_BITFIELD_TYPE_MATTERS 1 +/* Major revision number of the ARM Architecture implemented by the target. */ +extern unsigned aarch64_architecture_version; /* Instruction tuning/selection flags. */ diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index d9033c4..5c9672f 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -166,7 +166,10 @@ extern char arm_arch_name[]; builtin_define ("__ARM_EABI__"); \ } \ if (TARGET_IDIV) \ - builtin_define ("__ARM_ARCH_EXT_IDIV__"); \ + { \ + builtin_define ("__ARM_ARCH_EXT_IDIV__"); \ + builtin_define ("__ARM_FEATURE_IDIV"); \ + } \ } while (0) #include "config/arm/arm-opts.h" diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index c285aa5..3bf0349 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -9110,14 +9110,12 @@ instructions, but allow the compiler to schedule those calls. @menu * AArch64 Built-in Functions:: -* AArch64 intrinsics:: * Alpha Built-in Functions:: * Altera Nios II Built-in Functions:: * ARC Built-in Functions:: * ARC SIMD Built-in Functions:: * ARM iWMMXt Built-in Functions:: -* ARM NEON Intrinsics:: -* ARM ACLE Intrinsics:: +* ARM C Language Extensions (ACLE):: * ARM Floating Point Status and Control Intrinsics:: * AVR Built-in Functions:: * Blackfin Built-in Functions:: @@ -9156,11 +9154,6 @@ unsigned int __builtin_aarch64_get_fpsr () void __builtin_aarch64_set_fpsr (unsigned int) @end smallexample -@node AArch64 intrinsics -@subsection ACLE Intrinsics for AArch64 - -@include aarch64-acle-intrinsics.texi - @node Alpha Built-in Functions @subsection Alpha Built-in Functions @@ -9924,18 +9917,29 @@ long long __builtin_arm_wxor (long long, long long) long long __builtin_arm_wzero () @end smallexample -@node ARM NEON Intrinsics -@subsection ARM NEON Intrinsics -These built-in intrinsics for the ARM Advanced SIMD extension are available -when the @option{-mfpu=neon} switch is used: +@node ARM C Language Extensions (ACLE) +@subsection ARM C Language Extensions (ACLE) + +GCC implements extensions for C as described in the ARM C Language +Extensions (ACLE) specification, which can be found at +@uref{http://infocenter.arm.com/help/topic/com.arm.doc.ihi0053c/IHI0053C_acle_2_0.pdf}. -@include arm-neon-intrinsics.texi +As a part of ACLE, GCC implements extensions for Advanced SIMD as described in +the ARM C Language Extensions Specification. The complete list of Advanced SIMD +intrinsics can be found at +@uref{http://infocenter.arm.com/help/topic/com.arm.doc.ihi0073a/IHI0073A_arm_neon_intrinsics_ref.pdf}. +The built-in intrinsics for the Advanced SIMD extension are available when +NEON is enabled. -@node ARM ACLE Intrinsics -@subsection ARM ACLE Intrinsics +Currently, ARM and AArch64 back-ends do not support ACLE 2.0 fully. Both +back-ends support CRC32 intrinsics from @file{arm_acle.h}. The ARM backend's +16-bit floating-point Advanded SIMD Intrinsics currently comply to ACLE v1.1. +AArch64's backend does not have support for 16-bit floating point Advanced SIMD +Intrinsics yet. -@include arm-acle-intrinsics.texi +See @ref{ARM Options} and @ref{AArch64 Options} for more information on the +availability of extensions. @node ARM Floating Point Status and Control Intrinsics @subsection ARM Floating Point Status and Control Intrinsics -- 2.7.4