From 713a4c5b1d601f57d538fdbb1e8f6bc05ce07275 Mon Sep 17 00:00:00 2001
From: Simon Hausmann <simon.hausmann@digia.com>
Date: Fri, 19 Jul 2013 16:07:07 +0200
Subject: [PATCH] Fix FDE generation on Intel 32-bit

Make the generated FDE program reflect that ESI and EDI are callee
saved registers. For some reason the program we've had in qv4unwindhelper_p-dw.h
for 32-bit was already correct, but the generator was broken (and even mixed
up the registers).

Change-Id: Id8132580d20636c8ea17f8460d161547227c95fc
Reviewed-by: Erik Verbruggen <erik.verbruggen@digia.com>
---
 tools/fdegen/main.cpp | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/tools/fdegen/main.cpp b/tools/fdegen/main.cpp
index 313be40..8c24fb8 100644
--- a/tools/fdegen/main.cpp
+++ b/tools/fdegen/main.cpp
@@ -87,10 +87,10 @@ enum DwarfRegs {
     EDX = 1,
     ECX = 2,
     EBX = 3,
-    ESI = 4,
-    EDI = 5,
-    EBP = 6,
-    ESP = 7,
+    ESP = 4,
+    EBP = 5,
+    ESI = 6,
+    EDI = 7,
     EIP = 8,
 
     InstructionPointerRegister = EIP,
@@ -105,6 +105,9 @@ static const DwarfRegs calleeSavedRegisters[] = {
 #if defined(Q_PROCESSOR_X86_64)
     R12,
     R14
+#elif defined(Q_PROCESSOR_X86)
+    ESI,
+    EDI
 #endif
 };
 static const int calleeSavedRegisterCount = sizeof(calleeSavedRegisters) / sizeof(calleeSavedRegisters[0]);
-- 
2.7.4