From 70fa4c4f88609044dd0cd9671139d02d578d0df9 Mon Sep 17 00:00:00 2001 From: Shengchen Kan Date: Mon, 23 Dec 2019 16:29:14 +0800 Subject: [PATCH] [NFC] Style cleanups 1. Remove duplicate function for class name at the beginning of the comment. 2. Use auto where the type is already obvious from the context. --- llvm/include/llvm/MC/MCFragment.h | 35 ++++++++++---------- llvm/lib/MC/MCFragment.cpp | 22 ++++++------- llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 45 +++++++++++++------------- 3 files changed, 51 insertions(+), 51 deletions(-) diff --git a/llvm/include/llvm/MC/MCFragment.h b/llvm/include/llvm/MC/MCFragment.h index 246c17f..edc25ec 100644 --- a/llvm/include/llvm/MC/MCFragment.h +++ b/llvm/include/llvm/MC/MCFragment.h @@ -56,14 +56,13 @@ protected: bool HasInstructions; private: - /// LayoutOrder - The layout order of this fragment. + /// The layout order of this fragment. unsigned LayoutOrder; /// The data for the section this fragment is in. MCSection *Parent; - /// Atom - The atom this fragment is in, as represented by its defining - /// symbol. + /// The atom this fragment is in, as represented by its defining symbol. const MCSymbol *Atom; /// \name Assembler Backend Data @@ -71,7 +70,7 @@ private: // // FIXME: This could all be kept private to the assembler implementation. - /// Offset - The offset of this fragment in its section. This is ~0 until + /// The offset of this fragment in its section. This is ~0 until /// initialized. uint64_t Offset; @@ -134,8 +133,8 @@ protected: MCSection *Sec) : MCFragment(FType, HasInstructions, Sec) {} - /// STI - The MCSubtargetInfo in effect when the instruction was encoded. - /// must be non-null for instructions. + /// The MCSubtargetInfo in effect when the instruction was encoded. + /// It must be non-null for instructions. const MCSubtargetInfo *STI = nullptr; public: @@ -205,7 +204,7 @@ template class MCEncodedFragmentWithFixups : public MCEncodedFragmentWithContents { - /// Fixups - The list of fixups in this fragment. + /// The list of fixups in this fragment. SmallVector Fixups; protected: @@ -270,7 +269,7 @@ public: /// class MCRelaxableFragment : public MCEncodedFragmentWithFixups<8, 1> { - /// Inst - The instruction this is a fragment for. + /// The instruction this is a fragment for. MCInst Inst; public: @@ -288,21 +287,21 @@ public: }; class MCAlignFragment : public MCFragment { - /// Alignment - The alignment to ensure, in bytes. + /// The alignment to ensure, in bytes. unsigned Alignment; - /// EmitNops - Flag to indicate that (optimal) NOPs should be emitted instead + /// Flag to indicate that (optimal) NOPs should be emitted instead /// of using the provided value. The exact interpretation of this flag is /// target dependent. bool EmitNops : 1; - /// Value - Value to use for filling padding bytes. + /// Value to use for filling padding bytes. int64_t Value; - /// ValueSize - The size of the integer (in bytes) of \p Value. + /// The size of the integer (in bytes) of \p Value. unsigned ValueSize; - /// MaxBytesToEmit - The maximum number of bytes to emit; if the alignment + /// The maximum number of bytes to emit; if the alignment /// cannot be satisfied in this width then this fragment is ignored. unsigned MaxBytesToEmit; @@ -392,10 +391,10 @@ public: }; class MCLEBFragment : public MCFragment { - /// Value - The value this fragment should contain. + /// The value this fragment should contain. const MCExpr *Value; - /// IsSigned - True if this is a sleb128, false if uleb128. + /// True if this is a sleb128, false if uleb128. bool IsSigned; SmallString<8> Contents; @@ -424,11 +423,11 @@ public: }; class MCDwarfLineAddrFragment : public MCEncodedFragmentWithFixups<8, 1> { - /// LineDelta - the value of the difference between the two line numbers + /// The value of the difference between the two line numbers /// between two .loc dwarf directives. int64_t LineDelta; - /// AddrDelta - The expression for the difference of the two symbols that + /// The expression for the difference of the two symbols that /// make up the address delta between two .loc dwarf directives. const MCExpr *AddrDelta; @@ -453,7 +452,7 @@ public: }; class MCDwarfCallFrameFragment : public MCEncodedFragmentWithFixups<8, 1> { - /// AddrDelta - The expression for the difference of the two symbols that + /// The expression for the difference of the two symbols that /// make up the address delta between two .cfi_* dwarf directives. const MCExpr *AddrDelta; diff --git a/llvm/lib/MC/MCFragment.cpp b/llvm/lib/MC/MCFragment.cpp index 1f0615c..5192948 100644 --- a/llvm/lib/MC/MCFragment.cpp +++ b/llvm/lib/MC/MCFragment.cpp @@ -331,13 +331,13 @@ LLVM_DUMP_METHOD void MCFragment::dump() const { OS << "(this)) + if (const auto *EF = dyn_cast(this)) OS << " BundlePadding:" << static_cast(EF->getBundlePadding()); OS << ">"; switch (getKind()) { case MCFragment::FT_Align: { - const MCAlignFragment *AF = cast(this); + const auto *AF = cast(this); if (AF->hasEmitNops()) OS << " (emit nops)"; OS << "\n "; @@ -347,7 +347,7 @@ LLVM_DUMP_METHOD void MCFragment::dump() const { break; } case MCFragment::FT_Data: { - const MCDataFragment *DF = cast(this); + const auto *DF = cast(this); OS << "\n "; OS << " Contents:["; const SmallVectorImpl &Contents = DF->getContents(); @@ -370,7 +370,7 @@ LLVM_DUMP_METHOD void MCFragment::dump() const { break; } case MCFragment::FT_CompactEncodedInst: { - const MCCompactEncodedInstFragment *CEIF = + const auto *CEIF = cast(this); OS << "\n "; OS << " Contents:["; @@ -383,41 +383,41 @@ LLVM_DUMP_METHOD void MCFragment::dump() const { break; } case MCFragment::FT_Fill: { - const MCFillFragment *FF = cast(this); + const auto *FF = cast(this); OS << " Value:" << static_cast(FF->getValue()) << " ValueSize:" << static_cast(FF->getValueSize()) << " NumValues:" << FF->getNumValues(); break; } case MCFragment::FT_Relaxable: { - const MCRelaxableFragment *F = cast(this); + const auto *F = cast(this); OS << "\n "; OS << " Inst:"; F->getInst().dump_pretty(OS); break; } case MCFragment::FT_Org: { - const MCOrgFragment *OF = cast(this); + const auto *OF = cast(this); OS << "\n "; OS << " Offset:" << OF->getOffset() << " Value:" << static_cast(OF->getValue()); break; } case MCFragment::FT_Dwarf: { - const MCDwarfLineAddrFragment *OF = cast(this); + const auto *OF = cast(this); OS << "\n "; OS << " AddrDelta:" << OF->getAddrDelta() << " LineDelta:" << OF->getLineDelta(); break; } case MCFragment::FT_DwarfFrame: { - const MCDwarfCallFrameFragment *CF = cast(this); + const auto *CF = cast(this); OS << "\n "; OS << " AddrDelta:" << CF->getAddrDelta(); break; } case MCFragment::FT_LEB: { - const MCLEBFragment *LF = cast(this); + const auto *LF = cast(this); OS << "\n "; OS << " Value:" << LF->getValue() << " Signed:" << LF->isSigned(); break; @@ -436,7 +436,7 @@ LLVM_DUMP_METHOD void MCFragment::dump() const { break; } case MCFragment::FT_SymbolId: { - const MCSymbolIdFragment *F = cast(this); + const auto *F = cast(this); OS << "\n "; OS << " Sym:" << F->getSymbol(); break; diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h index 0bb23b0..4220dc2 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h +++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h @@ -129,8 +129,7 @@ namespace X86 { Invalid, }; - /// classifyFirstOpcodeInMacroFusion - return the type of the first - /// instruction in macro-fusion. + /// \returns the type of the first instruction in macro-fusion. inline FirstMacroFusionInstKind classifyFirstOpcodeInMacroFusion(unsigned Opcode) { switch (Opcode) { @@ -278,8 +277,7 @@ namespace X86 { } } - /// classifySecondCondCodeInMacroFusion - return the type of the second - /// instruction in macro-fusion. + /// \returns the type of the second instruction in macro-fusion. inline SecondMacroFusionInstKind classifySecondCondCodeInMacroFusion(X86::CondCode CC) { if (CC == X86::COND_INVALID) @@ -326,6 +324,10 @@ namespace X86 { } } + /// \param FirstKind kind of the first instruction in macro fusion. + /// \param SecondKind kind of the second instruction in macro fusion. + /// + /// \returns true if the two instruction can be macro fused. inline bool isMacroFused(FirstMacroFusionInstKind FirstKind, SecondMacroFusionInstKind SecondKind) { switch (FirstKind) { @@ -887,9 +889,8 @@ namespace X86II { NOTRACK = 1ULL << NoTrackShift }; - // getBaseOpcodeFor - This function returns the "base" X86 opcode for the - // specified machine instruction. - // + /// \returns the "base" X86 opcode for the specified machine + /// instruction. inline uint8_t getBaseOpcodeFor(uint64_t TSFlags) { return TSFlags >> X86II::OpcodeShift; } @@ -898,8 +899,8 @@ namespace X86II { return (TSFlags & X86II::ImmMask) != 0; } - /// getSizeOfImm - Decode the "size of immediate" field from the TSFlags field - /// of the specified instruction. + /// Decode the "size of immediate" field from the TSFlags field of the + /// specified instruction. inline unsigned getSizeOfImm(uint64_t TSFlags) { switch (TSFlags & X86II::ImmMask) { default: llvm_unreachable("Unknown immediate size"); @@ -915,8 +916,8 @@ namespace X86II { } } - /// isImmPCRel - Return true if the immediate of the specified instruction's - /// TSFlags indicates that it is pc relative. + /// \returns true if the immediate of the specified instruction's TSFlags + /// indicates that it is pc relative. inline bool isImmPCRel(uint64_t TSFlags) { switch (TSFlags & X86II::ImmMask) { default: llvm_unreachable("Unknown immediate size"); @@ -934,7 +935,7 @@ namespace X86II { } } - /// isImmSigned - Return true if the immediate of the specified instruction's + /// \returns true if the immediate of the specified instruction's /// TSFlags indicates that it is signed. inline bool isImmSigned(uint64_t TSFlags) { switch (TSFlags & X86II::ImmMask) { @@ -953,8 +954,8 @@ namespace X86II { } } - /// getOperandBias - compute whether all of the def operands are repeated - /// in the uses and therefore should be skipped. + /// Compute whether all of the def operands are repeated in the uses and + /// therefore should be skipped. /// This determines the start of the unique operand list. We need to determine /// if all of the defs have a corresponding tied operand in the uses. /// Unfortunately, the tied operand information is encoded in the uses not @@ -992,8 +993,8 @@ namespace X86II { } } - /// getMemoryOperandNo - The function returns the MCInst operand # for the - /// first field of the memory operand. If the instruction doesn't have a + /// The function returns the MCInst operand # for the first field of the + /// memory operand. If the instruction doesn't have a /// memory operand, this returns -1. /// /// Note that this ignores tied operands. If there is a tied register which @@ -1079,8 +1080,8 @@ namespace X86II { } } - /// isX86_64ExtendedReg - Is the MachineOperand a x86-64 extended (r8 or - /// higher) register? e.g. r8, xmm8, xmm13, etc. + /// \returns true if the MachineOperand is a x86-64 extended (r8 or + /// higher) register, e.g. r8, xmm8, xmm13, etc. inline bool isX86_64ExtendedReg(unsigned RegNo) { if ((RegNo >= X86::XMM8 && RegNo <= X86::XMM31) || (RegNo >= X86::YMM8 && RegNo <= X86::YMM31) || @@ -1106,8 +1107,8 @@ namespace X86II { return false; } - /// is32ExtendedReg - Is the MemoryOperand a 32 extended (zmm16 or higher) - /// registers? e.g. zmm21, etc. + /// \returns true if the MemoryOperand is a 32 extended (zmm16 or higher) + /// registers, e.g. zmm21, etc. static inline bool is32ExtendedReg(unsigned RegNo) { return ((RegNo >= X86::XMM16 && RegNo <= X86::XMM31) || (RegNo >= X86::YMM16 && RegNo <= X86::YMM31) || @@ -1120,12 +1121,12 @@ namespace X86II { reg == X86::SIL || reg == X86::DIL); } - /// isKMasked - Is this a masked instruction. + /// \returns true if this is a masked instruction. inline bool isKMasked(uint64_t TSFlags) { return (TSFlags & X86II::EVEX_K) != 0; } - /// isKMergedMasked - Is this a merge masked instruction. + /// \returns true if this is a merge masked instruction. inline bool isKMergeMasked(uint64_t TSFlags) { return isKMasked(TSFlags) && (TSFlags & X86II::EVEX_Z) == 0; } -- 2.7.4