From 70bc7182cbf1bb07e414bbb553890ddf1b540264 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 20 Aug 2015 14:54:21 +1000 Subject: [PATCH] drm/nouveau/ltc: convert to new-style nvkm_subdev Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/include/nvkm/subdev/ltc.h | 35 +++--- drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | 42 +++---- drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c | 9 -- drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c | 8 -- drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c | 4 - drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c | 10 +- drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c | 4 +- drivers/gpu/drm/nouveau/nvkm/subdev/ltc/base.c | 126 +++++++++++---------- drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gf100.c | 124 ++++++++------------ drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gk104.c | 34 +++--- drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.c | 101 +++++++---------- drivers/gpu/drm/nouveau/nvkm/subdev/ltc/priv.h | 76 +++---------- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gf100.c | 4 +- 13 files changed, 235 insertions(+), 342 deletions(-) diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/ltc.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/ltc.h index e8234e5..c773b5e 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/ltc.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/ltc.h @@ -1,31 +1,36 @@ #ifndef __NVKM_LTC_H__ #define __NVKM_LTC_H__ #include -struct nvkm_mm_node; +#include #define NVKM_LTC_MAX_ZBC_CNT 16 struct nvkm_ltc { + const struct nvkm_ltc_func *func; struct nvkm_subdev subdev; - int (*tags_alloc)(struct nvkm_ltc *, u32 count, - struct nvkm_mm_node **); - void (*tags_free)(struct nvkm_ltc *, struct nvkm_mm_node **); - void (*tags_clear)(struct nvkm_ltc *, u32 first, u32 count); + u32 ltc_nr; + u32 lts_nr; + + u32 num_tags; + u32 tag_base; + struct nvkm_mm tags; + struct nvkm_mm_node *tag_ram; int zbc_min; int zbc_max; - int (*zbc_color_get)(struct nvkm_ltc *, int index, const u32[4]); - int (*zbc_depth_get)(struct nvkm_ltc *, int index, const u32); + u32 zbc_color[NVKM_LTC_MAX_ZBC_CNT][4]; + u32 zbc_depth[NVKM_LTC_MAX_ZBC_CNT]; }; -static inline struct nvkm_ltc * -nvkm_ltc(void *obj) -{ - return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_LTC); -} +int nvkm_ltc_tags_alloc(struct nvkm_ltc *, u32 count, struct nvkm_mm_node **); +void nvkm_ltc_tags_free(struct nvkm_ltc *, struct nvkm_mm_node **); +void nvkm_ltc_tags_clear(struct nvkm_ltc *, u32 first, u32 count); + +int nvkm_ltc_zbc_color_get(struct nvkm_ltc *, int index, const u32[4]); +int nvkm_ltc_zbc_depth_get(struct nvkm_ltc *, int index, const u32); -extern struct nvkm_oclass *gf100_ltc_oclass; -extern struct nvkm_oclass *gk104_ltc_oclass; -extern struct nvkm_oclass *gm107_ltc_oclass; +int gf100_ltc_new(struct nvkm_device *, int, struct nvkm_ltc **); +int gk104_ltc_new(struct nvkm_device *, int, struct nvkm_ltc **); +int gm107_ltc_new(struct nvkm_device *, int, struct nvkm_ltc **); #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index 3b83f17..d1ee594 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -1300,7 +1300,7 @@ nvc0_chipset = { .i2c = g94_i2c_new, .ibus = gf100_ibus_new, .imem = nv50_instmem_new, -// .ltc = gf100_ltc_new, + .ltc = gf100_ltc_new, // .mc = gf100_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, @@ -1335,7 +1335,7 @@ nvc1_chipset = { .i2c = g94_i2c_new, .ibus = gf100_ibus_new, .imem = nv50_instmem_new, -// .ltc = gf100_ltc_new, + .ltc = gf100_ltc_new, // .mc = gf106_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, @@ -1369,7 +1369,7 @@ nvc3_chipset = { .i2c = g94_i2c_new, .ibus = gf100_ibus_new, .imem = nv50_instmem_new, -// .ltc = gf100_ltc_new, + .ltc = gf100_ltc_new, // .mc = gf106_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, @@ -1403,7 +1403,7 @@ nvc4_chipset = { .i2c = g94_i2c_new, .ibus = gf100_ibus_new, .imem = nv50_instmem_new, -// .ltc = gf100_ltc_new, + .ltc = gf100_ltc_new, // .mc = gf100_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, @@ -1438,7 +1438,7 @@ nvc8_chipset = { .i2c = g94_i2c_new, .ibus = gf100_ibus_new, .imem = nv50_instmem_new, -// .ltc = gf100_ltc_new, + .ltc = gf100_ltc_new, // .mc = gf100_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, @@ -1473,7 +1473,7 @@ nvce_chipset = { .i2c = g94_i2c_new, .ibus = gf100_ibus_new, .imem = nv50_instmem_new, -// .ltc = gf100_ltc_new, + .ltc = gf100_ltc_new, // .mc = gf100_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, @@ -1508,7 +1508,7 @@ nvcf_chipset = { .i2c = g94_i2c_new, .ibus = gf100_ibus_new, .imem = nv50_instmem_new, -// .ltc = gf100_ltc_new, + .ltc = gf100_ltc_new, // .mc = gf106_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, @@ -1542,7 +1542,7 @@ nvd7_chipset = { .i2c = gf117_i2c_new, .ibus = gf100_ibus_new, .imem = nv50_instmem_new, -// .ltc = gf100_ltc_new, + .ltc = gf100_ltc_new, // .mc = gf106_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, @@ -1574,7 +1574,7 @@ nvd9_chipset = { .i2c = gf119_i2c_new, .ibus = gf100_ibus_new, .imem = nv50_instmem_new, -// .ltc = gf100_ltc_new, + .ltc = gf100_ltc_new, // .mc = gf106_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, @@ -1608,7 +1608,7 @@ nve4_chipset = { .i2c = gk104_i2c_new, .ibus = gk104_ibus_new, .imem = nv50_instmem_new, -// .ltc = gk104_ltc_new, + .ltc = gk104_ltc_new, // .mc = gf106_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, @@ -1644,7 +1644,7 @@ nve6_chipset = { .i2c = gk104_i2c_new, .ibus = gk104_ibus_new, .imem = nv50_instmem_new, -// .ltc = gk104_ltc_new, + .ltc = gk104_ltc_new, // .mc = gf106_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, @@ -1680,7 +1680,7 @@ nve7_chipset = { .i2c = gk104_i2c_new, .ibus = gk104_ibus_new, .imem = nv50_instmem_new, -// .ltc = gk104_ltc_new, + .ltc = gk104_ltc_new, // .mc = gf106_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, @@ -1712,7 +1712,7 @@ nvea_chipset = { .fuse = gf100_fuse_new, .ibus = gk20a_ibus_new, .imem = gk20a_instmem_new, -// .ltc = gk104_ltc_new, + .ltc = gk104_ltc_new, // .mc = gk20a_mc_new, // .mmu = gf100_mmu_new, // .pmu = gk20a_pmu_new, @@ -1740,7 +1740,7 @@ nvf0_chipset = { .i2c = gk104_i2c_new, .ibus = gk104_ibus_new, .imem = nv50_instmem_new, -// .ltc = gk104_ltc_new, + .ltc = gk104_ltc_new, // .mc = gf106_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, @@ -1776,7 +1776,7 @@ nvf1_chipset = { .i2c = gf119_i2c_new, .ibus = gk104_ibus_new, .imem = nv50_instmem_new, -// .ltc = gk104_ltc_new, + .ltc = gk104_ltc_new, // .mc = gf106_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, @@ -1812,7 +1812,7 @@ nv106_chipset = { .i2c = gk104_i2c_new, .ibus = gk104_ibus_new, .imem = nv50_instmem_new, -// .ltc = gk104_ltc_new, + .ltc = gk104_ltc_new, // .mc = gk20a_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, @@ -1847,7 +1847,7 @@ nv108_chipset = { .i2c = gk104_i2c_new, .ibus = gk104_ibus_new, .imem = nv50_instmem_new, -// .ltc = gk104_ltc_new, + .ltc = gk104_ltc_new, // .mc = gk20a_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, @@ -1882,7 +1882,7 @@ nv117_chipset = { .i2c = gf119_i2c_new, .ibus = gk104_ibus_new, .imem = nv50_instmem_new, -// .ltc = gm107_ltc_new, + .ltc = gm107_ltc_new, // .mc = gk20a_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, @@ -1911,7 +1911,7 @@ nv124_chipset = { .i2c = gm204_i2c_new, .ibus = gk104_ibus_new, .imem = nv50_instmem_new, -// .ltc = gm107_ltc_new, + .ltc = gm107_ltc_new, // .mc = gk20a_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, @@ -1940,7 +1940,7 @@ nv126_chipset = { .i2c = gm204_i2c_new, .ibus = gk104_ibus_new, .imem = nv50_instmem_new, -// .ltc = gm107_ltc_new, + .ltc = gm107_ltc_new, // .mc = gk20a_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, @@ -1965,7 +1965,7 @@ nv12b_chipset = { .fuse = gm107_fuse_new, .ibus = gk20a_ibus_new, .imem = gk20a_instmem_new, -// .ltc = gm107_ltc_new, + .ltc = gm107_ltc_new, // .mc = gk20a_mc_new, // .mmu = gf100_mmu_new, // .mmu = gf100_mmu_new, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c index 8f9d871..e0b57ed 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c @@ -32,7 +32,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -53,7 +52,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -74,7 +72,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -94,7 +91,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -115,7 +111,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -135,7 +130,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -155,7 +149,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -176,7 +169,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf110_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -196,7 +188,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c index dcb0f6d..115931c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c @@ -32,7 +32,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk104_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -54,7 +53,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf110_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -76,7 +74,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk104_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -96,7 +93,6 @@ gk104_identify(struct nvkm_device *device) case 0xea: device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; - device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = gk20a_fifo_oclass; @@ -112,7 +108,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk110_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -134,7 +129,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk110_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -156,7 +150,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -177,7 +170,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c index 158af1f8..a3c87b2 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c @@ -32,7 +32,6 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; - device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; @@ -64,7 +63,6 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; - device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; #if 0 @@ -93,7 +91,6 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; - device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; #if 0 @@ -118,7 +115,6 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; - device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = gm20b_fifo_oclass; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c index 7917d141f..2f22af2 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c @@ -58,7 +58,7 @@ static int gf100_gr_zbc_color_get(struct gf100_gr *gr, int format, const u32 ds[4], const u32 l2[4]) { - struct nvkm_ltc *ltc = nvkm_ltc(gr); + struct nvkm_ltc *ltc = gr->base.engine.subdev.device->ltc; int zbc = -ENOSPC, i; for (i = ltc->zbc_min; i <= ltc->zbc_max; i++) { @@ -85,7 +85,7 @@ gf100_gr_zbc_color_get(struct gf100_gr *gr, int format, memcpy(gr->zbc_color[zbc].ds, ds, sizeof(gr->zbc_color[zbc].ds)); memcpy(gr->zbc_color[zbc].l2, l2, sizeof(gr->zbc_color[zbc].l2)); gr->zbc_color[zbc].format = format; - ltc->zbc_color_get(ltc, zbc, l2); + nvkm_ltc_zbc_color_get(ltc, zbc, l2); gf100_gr_zbc_clear_color(gr, zbc); return zbc; } @@ -105,7 +105,7 @@ static int gf100_gr_zbc_depth_get(struct gf100_gr *gr, int format, const u32 ds, const u32 l2) { - struct nvkm_ltc *ltc = nvkm_ltc(gr); + struct nvkm_ltc *ltc = gr->base.engine.subdev.device->ltc; int zbc = -ENOSPC, i; for (i = ltc->zbc_min; i <= ltc->zbc_max; i++) { @@ -130,7 +130,7 @@ gf100_gr_zbc_depth_get(struct gf100_gr *gr, int format, gr->zbc_depth[zbc].format = format; gr->zbc_depth[zbc].ds = ds; gr->zbc_depth[zbc].l2 = l2; - ltc->zbc_depth_get(ltc, zbc, l2); + nvkm_ltc_zbc_depth_get(ltc, zbc, l2); gf100_gr_zbc_clear_depth(gr, zbc); return zbc; } @@ -680,7 +680,7 @@ gf100_gr_zbc_init(struct gf100_gr *gr) 0x00000000, 0x00000000, 0x00000000, 0x00000000 }; const u32 f32_1[] = { 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000 }; - struct nvkm_ltc *ltc = nvkm_ltc(gr); + struct nvkm_ltc *ltc = gr->base.engine.subdev.device->ltc; int index; if (!gr->zbc_color[0].format) { diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c index 71902b6..772425c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c @@ -434,7 +434,7 @@ gf100_ram_put(struct nvkm_ram *ram, struct nvkm_mem **pmem) mutex_lock(&ram->fb->subdev.mutex); if (mem->tag) - ltc->tags_free(ltc, &mem->tag); + nvkm_ltc_tags_free(ltc, &mem->tag); __nv50_ram_put(ram, mem); mutex_unlock(&ram->fb->subdev.mutex); @@ -472,7 +472,7 @@ gf100_ram_get(struct nvkm_ram *ram, u64 size, u32 align, u32 ncmin, /* compression only works with lpages */ if (align == (1 << (17 - NVKM_RAM_MM_SHIFT))) { int n = size >> 5; - ltc->tags_alloc(ltc, n, &mem->tag); + nvkm_ltc_tags_alloc(ltc, n, &mem->tag); } if (unlikely(!mem->tag)) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/base.c b/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/base.c index d0af1ae..930d25b 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/base.c @@ -23,102 +23,110 @@ */ #include "priv.h" -static int -nvkm_ltc_tags_alloc(struct nvkm_ltc *obj, u32 n, struct nvkm_mm_node **pnode) -{ - struct nvkm_ltc_priv *ltc = container_of(obj, typeof(*ltc), base); - int ret; +#include - ret = nvkm_mm_head(<c->tags, 0, 1, n, n, 1, pnode); +int +nvkm_ltc_tags_alloc(struct nvkm_ltc *ltc, u32 n, struct nvkm_mm_node **pnode) +{ + int ret = nvkm_mm_head(<c->tags, 0, 1, n, n, 1, pnode); if (ret) *pnode = NULL; - return ret; } -static void -nvkm_ltc_tags_free(struct nvkm_ltc *obj, struct nvkm_mm_node **pnode) +void +nvkm_ltc_tags_free(struct nvkm_ltc *ltc, struct nvkm_mm_node **pnode) { - struct nvkm_ltc_priv *ltc = container_of(obj, typeof(*ltc), base); nvkm_mm_free(<c->tags, pnode); } -static void -nvkm_ltc_tags_clear(struct nvkm_ltc *obj, u32 first, u32 count) +void +nvkm_ltc_tags_clear(struct nvkm_ltc *ltc, u32 first, u32 count) { - struct nvkm_ltc_priv *ltc = container_of(obj, typeof(*ltc), base); - const struct nvkm_ltc_impl *impl = (void *)nv_oclass(ltc); const u32 limit = first + count - 1; BUG_ON((first > limit) || (limit >= ltc->num_tags)); - impl->cbc_clear(ltc, first, limit); - impl->cbc_wait(ltc); + ltc->func->cbc_clear(ltc, first, limit); + ltc->func->cbc_wait(ltc); } -static int -nvkm_ltc_zbc_color_get(struct nvkm_ltc *obj, int index, const u32 color[4]) +int +nvkm_ltc_zbc_color_get(struct nvkm_ltc *ltc, int index, const u32 color[4]) { - struct nvkm_ltc_priv *ltc = container_of(obj, typeof(*ltc), base); - const struct nvkm_ltc_impl *impl = (void *)nv_oclass(ltc); memcpy(ltc->zbc_color[index], color, sizeof(ltc->zbc_color[index])); - impl->zbc_clear_color(ltc, index, color); + ltc->func->zbc_clear_color(ltc, index, color); return index; } -static int -nvkm_ltc_zbc_depth_get(struct nvkm_ltc *obj, int index, const u32 depth) +int +nvkm_ltc_zbc_depth_get(struct nvkm_ltc *ltc, int index, const u32 depth) { - struct nvkm_ltc_priv *ltc = container_of(obj, typeof(*ltc), base); - const struct nvkm_ltc_impl *impl = (void *)nv_oclass(ltc); ltc->zbc_depth[index] = depth; - impl->zbc_clear_depth(ltc, index, depth); + ltc->func->zbc_clear_depth(ltc, index, depth); return index; } -int -_nvkm_ltc_init(struct nvkm_object *object) +static void +nvkm_ltc_intr(struct nvkm_subdev *subdev) { - struct nvkm_ltc_priv *ltc = (void *)object; - const struct nvkm_ltc_impl *impl = (void *)nv_oclass(object); - int ret, i; + struct nvkm_ltc *ltc = nvkm_ltc(subdev); + ltc->func->intr(ltc); +} - ret = nvkm_subdev_init_old(<c->base.subdev); - if (ret) - return ret; +static int +nvkm_ltc_oneinit(struct nvkm_subdev *subdev) +{ + struct nvkm_ltc *ltc = nvkm_ltc(subdev); + return ltc->func->oneinit(ltc); +} + +static int +nvkm_ltc_init(struct nvkm_subdev *subdev) +{ + struct nvkm_ltc *ltc = nvkm_ltc(subdev); + int i; - for (i = ltc->base.zbc_min; i <= ltc->base.zbc_max; i++) { - impl->zbc_clear_color(ltc, i, ltc->zbc_color[i]); - impl->zbc_clear_depth(ltc, i, ltc->zbc_depth[i]); + for (i = ltc->zbc_min; i <= ltc->zbc_max; i++) { + ltc->func->zbc_clear_color(ltc, i, ltc->zbc_color[i]); + ltc->func->zbc_clear_depth(ltc, i, ltc->zbc_depth[i]); } + ltc->func->init(ltc); return 0; } +static void * +nvkm_ltc_dtor(struct nvkm_subdev *subdev) +{ + struct nvkm_ltc *ltc = nvkm_ltc(subdev); + struct nvkm_ram *ram = ltc->subdev.device->fb->ram; + nvkm_mm_fini(<c->tags); + if (ram) + nvkm_mm_free(&ram->vram, <c->tag_ram); + return ltc; +} + +static const struct nvkm_subdev_func +nvkm_ltc = { + .dtor = nvkm_ltc_dtor, + .oneinit = nvkm_ltc_oneinit, + .init = nvkm_ltc_init, + .intr = nvkm_ltc_intr, +}; + int -nvkm_ltc_create_(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, int length, void **pobject) +nvkm_ltc_new_(const struct nvkm_ltc_func *func, struct nvkm_device *device, + int index, struct nvkm_ltc **pltc) { - const struct nvkm_ltc_impl *impl = (void *)oclass; - struct nvkm_ltc_priv *ltc; - int ret; + struct nvkm_ltc *ltc; - ret = nvkm_subdev_create_(parent, engine, oclass, 0, "PLTCG", - "l2c", length, pobject); - ltc = *pobject; - if (ret) - return ret; - - memset(ltc->zbc_color, 0x00, sizeof(ltc->zbc_color)); - memset(ltc->zbc_depth, 0x00, sizeof(ltc->zbc_depth)); - - ltc->base.subdev.intr = impl->intr; - ltc->base.tags_alloc = nvkm_ltc_tags_alloc; - ltc->base.tags_free = nvkm_ltc_tags_free; - ltc->base.tags_clear = nvkm_ltc_tags_clear; - ltc->base.zbc_min = 1; /* reserve 0 for disabled */ - ltc->base.zbc_max = min(impl->zbc, NVKM_LTC_MAX_ZBC_CNT) - 1; - ltc->base.zbc_color_get = nvkm_ltc_zbc_color_get; - ltc->base.zbc_depth_get = nvkm_ltc_zbc_depth_get; + if (!(ltc = *pltc = kzalloc(sizeof(*ltc), GFP_KERNEL))) + return -ENOMEM; + + nvkm_subdev_ctor(&nvkm_ltc, device, index, 0, <c->subdev); + ltc->func = func; + ltc->zbc_min = 1; /* reserve 0 for disabled */ + ltc->zbc_max = min(func->zbc, NVKM_LTC_MAX_ZBC_CNT) - 1; return 0; } diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gf100.c index 5cb7604..45ac765 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gf100.c @@ -28,18 +28,18 @@ #include void -gf100_ltc_cbc_clear(struct nvkm_ltc_priv *ltc, u32 start, u32 limit) +gf100_ltc_cbc_clear(struct nvkm_ltc *ltc, u32 start, u32 limit) { - struct nvkm_device *device = ltc->base.subdev.device; + struct nvkm_device *device = ltc->subdev.device; nvkm_wr32(device, 0x17e8cc, start); nvkm_wr32(device, 0x17e8d0, limit); nvkm_wr32(device, 0x17e8c8, 0x00000004); } void -gf100_ltc_cbc_wait(struct nvkm_ltc_priv *ltc) +gf100_ltc_cbc_wait(struct nvkm_ltc *ltc) { - struct nvkm_device *device = ltc->base.subdev.device; + struct nvkm_device *device = ltc->subdev.device; int c, s; for (c = 0; c < ltc->ltc_nr; c++) { for (s = 0; s < ltc->lts_nr; s++) { @@ -53,9 +53,9 @@ gf100_ltc_cbc_wait(struct nvkm_ltc_priv *ltc) } void -gf100_ltc_zbc_clear_color(struct nvkm_ltc_priv *ltc, int i, const u32 color[4]) +gf100_ltc_zbc_clear_color(struct nvkm_ltc *ltc, int i, const u32 color[4]) { - struct nvkm_device *device = ltc->base.subdev.device; + struct nvkm_device *device = ltc->subdev.device; nvkm_mask(device, 0x17ea44, 0x0000000f, i); nvkm_wr32(device, 0x17ea48, color[0]); nvkm_wr32(device, 0x17ea4c, color[1]); @@ -64,9 +64,9 @@ gf100_ltc_zbc_clear_color(struct nvkm_ltc_priv *ltc, int i, const u32 color[4]) } void -gf100_ltc_zbc_clear_depth(struct nvkm_ltc_priv *ltc, int i, const u32 depth) +gf100_ltc_zbc_clear_depth(struct nvkm_ltc *ltc, int i, const u32 depth) { - struct nvkm_device *device = ltc->base.subdev.device; + struct nvkm_device *device = ltc->subdev.device; nvkm_mask(device, 0x17ea44, 0x0000000f, i); nvkm_wr32(device, 0x17ea58, depth); } @@ -90,9 +90,9 @@ gf100_ltc_lts_intr_name[] = { }; static void -gf100_ltc_lts_intr(struct nvkm_ltc_priv *ltc, int c, int s) +gf100_ltc_lts_intr(struct nvkm_ltc *ltc, int c, int s) { - struct nvkm_subdev *subdev = <c->base.subdev; + struct nvkm_subdev *subdev = <c->subdev; struct nvkm_device *device = subdev->device; u32 base = 0x141000 + (c * 0x2000) + (s * 0x400); u32 intr = nvkm_rd32(device, base + 0x020); @@ -108,10 +108,9 @@ gf100_ltc_lts_intr(struct nvkm_ltc_priv *ltc, int c, int s) } void -gf100_ltc_intr(struct nvkm_subdev *subdev) +gf100_ltc_intr(struct nvkm_ltc *ltc) { - struct nvkm_ltc_priv *ltc = (void *)subdev; - struct nvkm_device *device = ltc->base.subdev.device; + struct nvkm_device *device = ltc->subdev.device; u32 mask; mask = nvkm_rd32(device, 0x00017c); @@ -123,44 +122,12 @@ gf100_ltc_intr(struct nvkm_subdev *subdev) } } -static int -gf100_ltc_init(struct nvkm_object *object) -{ - struct nvkm_ltc_priv *ltc = (void *)object; - struct nvkm_device *device = ltc->base.subdev.device; - u32 lpg128 = !(nvkm_rd32(device, 0x100c80) & 0x00000001); - int ret; - - ret = nvkm_ltc_init(ltc); - if (ret) - return ret; - - nvkm_mask(device, 0x17e820, 0x00100000, 0x00000000); /* INTR_EN &= ~0x10 */ - nvkm_wr32(device, 0x17e8d8, ltc->ltc_nr); - nvkm_wr32(device, 0x17e8d4, ltc->tag_base); - nvkm_mask(device, 0x17e8c0, 0x00000002, lpg128 ? 0x00000002 : 0x00000000); - return 0; -} - -void -gf100_ltc_dtor(struct nvkm_object *object) -{ - struct nvkm_ltc_priv *ltc = (void *)object; - struct nvkm_ram *ram = ltc->base.subdev.device->fb->ram; - - nvkm_mm_fini(<c->tags); - if (ram) - nvkm_mm_free(&ram->vram, <c->tag_ram); - - nvkm_ltc_destroy(ltc); -} - /* TODO: Figure out tag memory details and drop the over-cautious allocation. */ int -gf100_ltc_init_tag_ram(struct nvkm_ltc_priv *ltc) +gf100_ltc_oneinit_tag_ram(struct nvkm_ltc *ltc) { - struct nvkm_ram *ram = ltc->base.subdev.device->fb->ram; + struct nvkm_ram *ram = ltc->subdev.device->fb->ram; u32 tag_size, tag_margin, tag_align; int ret; @@ -205,54 +172,53 @@ gf100_ltc_init_tag_ram(struct nvkm_ltc_priv *ltc) } mm_init: - ret = nvkm_mm_init(<c->tags, 0, ltc->num_tags, 1); - return ret; + return nvkm_mm_init(<c->tags, 0, ltc->num_tags, 1); } int -gf100_ltc_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) +gf100_ltc_oneinit(struct nvkm_ltc *ltc) { - struct nvkm_device *device = (void *)parent; - struct nvkm_ltc_priv *ltc; - u32 parts, mask; - int ret, i; - - ret = nvkm_ltc_create(parent, engine, oclass, <c); - *pobject = nv_object(ltc); - if (ret) - return ret; + struct nvkm_device *device = ltc->subdev.device; + const u32 parts = nvkm_rd32(device, 0x022438); + const u32 mask = nvkm_rd32(device, 0x022554); + const u32 slice = nvkm_rd32(device, 0x17e8dc) >> 28; + int i; - parts = nvkm_rd32(device, 0x022438); - mask = nvkm_rd32(device, 0x022554); for (i = 0; i < parts; i++) { if (!(mask & (1 << i))) ltc->ltc_nr++; } - ltc->lts_nr = nvkm_rd32(device, 0x17e8dc) >> 28; + ltc->lts_nr = slice; + + return gf100_ltc_oneinit_tag_ram(ltc); +} - ret = gf100_ltc_init_tag_ram(ltc); - if (ret) - return ret; +static void +gf100_ltc_init(struct nvkm_ltc *ltc) +{ + struct nvkm_device *device = ltc->subdev.device; + u32 lpg128 = !(nvkm_rd32(device, 0x100c80) & 0x00000001); - nv_subdev(ltc)->intr = gf100_ltc_intr; - return 0; + nvkm_mask(device, 0x17e820, 0x00100000, 0x00000000); /* INTR_EN &= ~0x10 */ + nvkm_wr32(device, 0x17e8d8, ltc->ltc_nr); + nvkm_wr32(device, 0x17e8d4, ltc->tag_base); + nvkm_mask(device, 0x17e8c0, 0x00000002, lpg128 ? 0x00000002 : 0x00000000); } -struct nvkm_oclass * -gf100_ltc_oclass = &(struct nvkm_ltc_impl) { - .base.handle = NV_SUBDEV(LTC, 0xc0), - .base.ofuncs = &(struct nvkm_ofuncs) { - .ctor = gf100_ltc_ctor, - .dtor = gf100_ltc_dtor, - .init = gf100_ltc_init, - .fini = _nvkm_ltc_fini, - }, +static const struct nvkm_ltc_func +gf100_ltc = { + .oneinit = gf100_ltc_oneinit, + .init = gf100_ltc_init, .intr = gf100_ltc_intr, .cbc_clear = gf100_ltc_cbc_clear, .cbc_wait = gf100_ltc_cbc_wait, .zbc = 16, .zbc_clear_color = gf100_ltc_zbc_clear_color, .zbc_clear_depth = gf100_ltc_zbc_clear_depth, -}.base; +}; + +int +gf100_ltc_new(struct nvkm_device *device, int index, struct nvkm_ltc **pltc) +{ + return nvkm_ltc_new_(&gf100_ltc, device, index, pltc); +} diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gk104.c b/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gk104.c index a1f97d2..839e6b4 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gk104.c @@ -23,38 +23,32 @@ */ #include "priv.h" -static int -gk104_ltc_init(struct nvkm_object *object) +static void +gk104_ltc_init(struct nvkm_ltc *ltc) { - struct nvkm_ltc_priv *ltc = (void *)object; - struct nvkm_device *device = ltc->base.subdev.device; + struct nvkm_device *device = ltc->subdev.device; u32 lpg128 = !(nvkm_rd32(device, 0x100c80) & 0x00000001); - int ret; - - ret = nvkm_ltc_init(ltc); - if (ret) - return ret; nvkm_wr32(device, 0x17e8d8, ltc->ltc_nr); nvkm_wr32(device, 0x17e000, ltc->ltc_nr); nvkm_wr32(device, 0x17e8d4, ltc->tag_base); nvkm_mask(device, 0x17e8c0, 0x00000002, lpg128 ? 0x00000002 : 0x00000000); - return 0; } -struct nvkm_oclass * -gk104_ltc_oclass = &(struct nvkm_ltc_impl) { - .base.handle = NV_SUBDEV(LTC, 0xe4), - .base.ofuncs = &(struct nvkm_ofuncs) { - .ctor = gf100_ltc_ctor, - .dtor = gf100_ltc_dtor, - .init = gk104_ltc_init, - .fini = _nvkm_ltc_fini, - }, +static const struct nvkm_ltc_func +gk104_ltc = { + .oneinit = gf100_ltc_oneinit, + .init = gk104_ltc_init, .intr = gf100_ltc_intr, .cbc_clear = gf100_ltc_cbc_clear, .cbc_wait = gf100_ltc_cbc_wait, .zbc = 16, .zbc_clear_color = gf100_ltc_zbc_clear_color, .zbc_clear_depth = gf100_ltc_zbc_clear_depth, -}.base; +}; + +int +gk104_ltc_new(struct nvkm_device *device, int index, struct nvkm_ltc **pltc) +{ + return nvkm_ltc_new_(&gk104_ltc, device, index, pltc); +} diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.c b/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.c index 431acbe..389331b 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.c @@ -27,18 +27,18 @@ #include static void -gm107_ltc_cbc_clear(struct nvkm_ltc_priv *ltc, u32 start, u32 limit) +gm107_ltc_cbc_clear(struct nvkm_ltc *ltc, u32 start, u32 limit) { - struct nvkm_device *device = ltc->base.subdev.device; + struct nvkm_device *device = ltc->subdev.device; nvkm_wr32(device, 0x17e270, start); nvkm_wr32(device, 0x17e274, limit); nvkm_wr32(device, 0x17e26c, 0x00000004); } static void -gm107_ltc_cbc_wait(struct nvkm_ltc_priv *ltc) +gm107_ltc_cbc_wait(struct nvkm_ltc *ltc) { - struct nvkm_device *device = ltc->base.subdev.device; + struct nvkm_device *device = ltc->subdev.device; int c, s; for (c = 0; c < ltc->ltc_nr; c++) { for (s = 0; s < ltc->lts_nr; s++) { @@ -52,9 +52,9 @@ gm107_ltc_cbc_wait(struct nvkm_ltc_priv *ltc) } static void -gm107_ltc_zbc_clear_color(struct nvkm_ltc_priv *ltc, int i, const u32 color[4]) +gm107_ltc_zbc_clear_color(struct nvkm_ltc *ltc, int i, const u32 color[4]) { - struct nvkm_device *device = ltc->base.subdev.device; + struct nvkm_device *device = ltc->subdev.device; nvkm_mask(device, 0x17e338, 0x0000000f, i); nvkm_wr32(device, 0x17e33c, color[0]); nvkm_wr32(device, 0x17e340, color[1]); @@ -63,17 +63,17 @@ gm107_ltc_zbc_clear_color(struct nvkm_ltc_priv *ltc, int i, const u32 color[4]) } static void -gm107_ltc_zbc_clear_depth(struct nvkm_ltc_priv *ltc, int i, const u32 depth) +gm107_ltc_zbc_clear_depth(struct nvkm_ltc *ltc, int i, const u32 depth) { - struct nvkm_device *device = ltc->base.subdev.device; + struct nvkm_device *device = ltc->subdev.device; nvkm_mask(device, 0x17e338, 0x0000000f, i); nvkm_wr32(device, 0x17e34c, depth); } static void -gm107_ltc_lts_isr(struct nvkm_ltc_priv *ltc, int c, int s) +gm107_ltc_lts_isr(struct nvkm_ltc *ltc, int c, int s) { - struct nvkm_subdev *subdev = <c->base.subdev; + struct nvkm_subdev *subdev = <c->subdev; struct nvkm_device *device = subdev->device; u32 base = 0x140000 + (c * 0x2000) + (s * 0x400); u32 stat = nvkm_rd32(device, base + 0x00c); @@ -85,10 +85,9 @@ gm107_ltc_lts_isr(struct nvkm_ltc_priv *ltc, int c, int s) } static void -gm107_ltc_intr(struct nvkm_subdev *subdev) +gm107_ltc_intr(struct nvkm_ltc *ltc) { - struct nvkm_ltc_priv *ltc = (void *)subdev; - struct nvkm_device *device = ltc->base.subdev.device; + struct nvkm_device *device = ltc->subdev.device; u32 mask; mask = nvkm_rd32(device, 0x00017c); @@ -101,66 +100,48 @@ gm107_ltc_intr(struct nvkm_subdev *subdev) } static int -gm107_ltc_init(struct nvkm_object *object) +gm107_ltc_oneinit(struct nvkm_ltc *ltc) { - struct nvkm_ltc_priv *ltc = (void *)object; - struct nvkm_device *device = ltc->base.subdev.device; - u32 lpg128 = !(nvkm_rd32(device, 0x100c80) & 0x00000001); - int ret; - - ret = nvkm_ltc_init(ltc); - if (ret) - return ret; - - nvkm_wr32(device, 0x17e27c, ltc->ltc_nr); - nvkm_wr32(device, 0x17e278, ltc->tag_base); - nvkm_mask(device, 0x17e264, 0x00000002, lpg128 ? 0x00000002 : 0x00000000); - return 0; -} + struct nvkm_device *device = ltc->subdev.device; + const u32 parts = nvkm_rd32(device, 0x022438); + const u32 mask = nvkm_rd32(device, 0x021c14); + const u32 slice = nvkm_rd32(device, 0x17e280) >> 28; + int i; -static int -gm107_ltc_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) -{ - struct nvkm_device *device = (void *)parent; - struct nvkm_ltc_priv *ltc; - u32 parts, mask; - int ret, i; - - ret = nvkm_ltc_create(parent, engine, oclass, <c); - *pobject = nv_object(ltc); - if (ret) - return ret; - - parts = nvkm_rd32(device, 0x022438); - mask = nvkm_rd32(device, 0x021c14); for (i = 0; i < parts; i++) { if (!(mask & (1 << i))) ltc->ltc_nr++; } - ltc->lts_nr = nvkm_rd32(device, 0x17e280) >> 28; + ltc->lts_nr = slice; + + return gf100_ltc_oneinit_tag_ram(ltc); +} - ret = gf100_ltc_init_tag_ram(ltc); - if (ret) - return ret; +static void +gm107_ltc_init(struct nvkm_ltc *ltc) +{ + struct nvkm_device *device = ltc->subdev.device; + u32 lpg128 = !(nvkm_rd32(device, 0x100c80) & 0x00000001); - return 0; + nvkm_wr32(device, 0x17e27c, ltc->ltc_nr); + nvkm_wr32(device, 0x17e278, ltc->tag_base); + nvkm_mask(device, 0x17e264, 0x00000002, lpg128 ? 0x00000002 : 0x00000000); } -struct nvkm_oclass * -gm107_ltc_oclass = &(struct nvkm_ltc_impl) { - .base.handle = NV_SUBDEV(LTC, 0xff), - .base.ofuncs = &(struct nvkm_ofuncs) { - .ctor = gm107_ltc_ctor, - .dtor = gf100_ltc_dtor, - .init = gm107_ltc_init, - .fini = _nvkm_ltc_fini, - }, +static const struct nvkm_ltc_func +gm107_ltc = { + .oneinit = gm107_ltc_oneinit, + .init = gm107_ltc_init, .intr = gm107_ltc_intr, .cbc_clear = gm107_ltc_cbc_clear, .cbc_wait = gm107_ltc_cbc_wait, .zbc = 16, .zbc_clear_color = gm107_ltc_zbc_clear_color, .zbc_clear_depth = gm107_ltc_zbc_clear_depth, -}.base; +}; + +int +gm107_ltc_new(struct nvkm_device *device, int index, struct nvkm_ltc **pltc) +{ + return nvkm_ltc_new_(&gm107_ltc, device, index, pltc); +} diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/priv.h b/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/priv.h index 0544288..4e05037 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/priv.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/priv.h @@ -1,69 +1,29 @@ #ifndef __NVKM_LTC_PRIV_H__ #define __NVKM_LTC_PRIV_H__ +#define nvkm_ltc(p) container_of((p), struct nvkm_ltc, subdev) #include -#include -struct nvkm_fb; +int nvkm_ltc_new_(const struct nvkm_ltc_func *, struct nvkm_device *, + int index, struct nvkm_ltc **); -struct nvkm_ltc_priv { - struct nvkm_ltc base; - u32 ltc_nr; - u32 lts_nr; +struct nvkm_ltc_func { + int (*oneinit)(struct nvkm_ltc *); + void (*init)(struct nvkm_ltc *); + void (*intr)(struct nvkm_ltc *); - u32 num_tags; - u32 tag_base; - struct nvkm_mm tags; - struct nvkm_mm_node *tag_ram; - - u32 zbc_color[NVKM_LTC_MAX_ZBC_CNT][4]; - u32 zbc_depth[NVKM_LTC_MAX_ZBC_CNT]; -}; - -#define nvkm_ltc_create(p,e,o,d) \ - nvkm_ltc_create_((p), (e), (o), sizeof(**d), (void **)d) -#define nvkm_ltc_destroy(p) ({ \ - struct nvkm_ltc_priv *_priv = (p); \ - _nvkm_ltc_dtor(nv_object(_priv)); \ -}) -#define nvkm_ltc_init(p) ({ \ - struct nvkm_ltc_priv *_priv = (p); \ - _nvkm_ltc_init(nv_object(_priv)); \ -}) -#define nvkm_ltc_fini(p,s) ({ \ - struct nvkm_ltc_priv *_priv = (p); \ - _nvkm_ltc_fini(nv_object(_priv), (s)); \ -}) - -int nvkm_ltc_create_(struct nvkm_object *, struct nvkm_object *, - struct nvkm_oclass *, int, void **); - -#define _nvkm_ltc_dtor _nvkm_subdev_dtor -int _nvkm_ltc_init(struct nvkm_object *); -#define _nvkm_ltc_fini _nvkm_subdev_fini - -int gf100_ltc_ctor(struct nvkm_object *, struct nvkm_object *, - struct nvkm_oclass *, void *, u32, - struct nvkm_object **); -void gf100_ltc_dtor(struct nvkm_object *); -int gf100_ltc_init_tag_ram(struct nvkm_ltc_priv *); -int gf100_ltc_tags_alloc(struct nvkm_ltc *, u32, struct nvkm_mm_node **); -void gf100_ltc_tags_free(struct nvkm_ltc *, struct nvkm_mm_node **); - -struct nvkm_ltc_impl { - struct nvkm_oclass base; - void (*intr)(struct nvkm_subdev *); - - void (*cbc_clear)(struct nvkm_ltc_priv *, u32 start, u32 limit); - void (*cbc_wait)(struct nvkm_ltc_priv *); + void (*cbc_clear)(struct nvkm_ltc *, u32 start, u32 limit); + void (*cbc_wait)(struct nvkm_ltc *); int zbc; - void (*zbc_clear_color)(struct nvkm_ltc_priv *, int, const u32[4]); - void (*zbc_clear_depth)(struct nvkm_ltc_priv *, int, const u32); + void (*zbc_clear_color)(struct nvkm_ltc *, int, const u32[4]); + void (*zbc_clear_depth)(struct nvkm_ltc *, int, const u32); }; -void gf100_ltc_intr(struct nvkm_subdev *); -void gf100_ltc_cbc_clear(struct nvkm_ltc_priv *, u32, u32); -void gf100_ltc_cbc_wait(struct nvkm_ltc_priv *); -void gf100_ltc_zbc_clear_color(struct nvkm_ltc_priv *, int, const u32[4]); -void gf100_ltc_zbc_clear_depth(struct nvkm_ltc_priv *, int, const u32); +int gf100_ltc_oneinit(struct nvkm_ltc *); +int gf100_ltc_oneinit_tag_ram(struct nvkm_ltc *); +void gf100_ltc_intr(struct nvkm_ltc *); +void gf100_ltc_cbc_clear(struct nvkm_ltc *, u32, u32); +void gf100_ltc_cbc_wait(struct nvkm_ltc *); +void gf100_ltc_zbc_clear_color(struct nvkm_ltc *, int, const u32[4]); +void gf100_ltc_zbc_clear_depth(struct nvkm_ltc *, int, const u32); #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gf100.c index e1374a0..6a2a2d5 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gf100.c @@ -108,11 +108,11 @@ gf100_vm_map(struct nvkm_vma *vma, struct nvkm_memory *pgt, pte <<= 3; if (mem->tag) { - struct nvkm_ltc *ltc = nvkm_ltc(vma->vm->mmu); + struct nvkm_ltc *ltc = vma->vm->mmu->subdev.device->ltc; u32 tag = mem->tag->offset + (delta >> 17); phys |= (u64)tag << (32 + 12); next |= (u64)1 << (32 + 12); - ltc->tags_clear(ltc, tag, cnt); + nvkm_ltc_tags_clear(ltc, tag, cnt); } nvkm_kmap(pgt); -- 2.7.4