From 70ab8ccd4f382a6c7e59c523c22b07fe03a95f52 Mon Sep 17 00:00:00 2001 From: Tom Tromey Date: Tue, 7 Aug 2018 12:48:47 -0600 Subject: [PATCH] Use CORE_ADDR_MAX in various "breaks" arrays Code like this: CORE_ADDR breaks[2] = {-1, -1}; ... gives a warning with -Wnarrowing. This patch changes all instances of this to use CORE_ADDR_MAX instead. gdb/ChangeLog 2018-08-27 Tom Tromey * rs6000-tdep.c (ppc_deal_with_atomic_sequence): Use CORE_ADDR_MAX. * mips-tdep.c (mips_deal_with_atomic_sequence) (micromips_deal_with_atomic_sequence): Use CORE_ADDR_MAX. * arch/arm-get-next-pcs.c (thumb_deal_with_atomic_sequence_raw) (arm_deal_with_atomic_sequence_raw): Use CORE_ADDR_MAX. * alpha-tdep.c (alpha_deal_with_atomic_sequence): Use CORE_ADDR_MAX. * aarch64-tdep.c (aarch64_software_single_step): Use CORE_ADDR_MAX. --- gdb/ChangeLog | 13 +++++++++++++ gdb/aarch64-tdep.c | 2 +- gdb/alpha-tdep.c | 2 +- gdb/arch/arm-get-next-pcs.c | 4 ++-- gdb/mips-tdep.c | 4 ++-- gdb/rs6000-tdep.c | 2 +- 6 files changed, 20 insertions(+), 7 deletions(-) diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 52bfeb6..1d16861 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,5 +1,18 @@ 2018-08-27 Tom Tromey + * rs6000-tdep.c (ppc_deal_with_atomic_sequence): Use + CORE_ADDR_MAX. + * mips-tdep.c (mips_deal_with_atomic_sequence) + (micromips_deal_with_atomic_sequence): Use CORE_ADDR_MAX. + * arch/arm-get-next-pcs.c (thumb_deal_with_atomic_sequence_raw) + (arm_deal_with_atomic_sequence_raw): Use CORE_ADDR_MAX. + * alpha-tdep.c (alpha_deal_with_atomic_sequence): Use + CORE_ADDR_MAX. + * aarch64-tdep.c (aarch64_software_single_step): Use + CORE_ADDR_MAX. + +2018-08-27 Tom Tromey + * linespec.c (complete_linespec_component): Add cast to "char". * completer.c (completion_tracker::build_completion_result): Add cast to "char". diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index 5c6eb98..62f680e 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -2472,7 +2472,7 @@ aarch64_software_single_step (struct regcache *regcache) const int insn_size = 4; const int atomic_sequence_length = 16; /* Instruction sequence length. */ CORE_ADDR pc = regcache_read_pc (regcache); - CORE_ADDR breaks[2] = { -1, -1 }; + CORE_ADDR breaks[2] = { CORE_ADDR_MAX, CORE_ADDR_MAX }; CORE_ADDR loc = pc; CORE_ADDR closing_insn = 0; uint32_t insn = read_memory_unsigned_integer (loc, insn_size, diff --git a/gdb/alpha-tdep.c b/gdb/alpha-tdep.c index 53943e1..e649bd2 100644 --- a/gdb/alpha-tdep.c +++ b/gdb/alpha-tdep.c @@ -767,7 +767,7 @@ static const int stq_c_opcode = 0x2f; static std::vector alpha_deal_with_atomic_sequence (struct gdbarch *gdbarch, CORE_ADDR pc) { - CORE_ADDR breaks[2] = {-1, -1}; + CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX}; CORE_ADDR loc = pc; CORE_ADDR closing_insn; /* Instruction that closes the atomic sequence. */ unsigned int insn = alpha_read_insn (gdbarch, loc); diff --git a/gdb/arch/arm-get-next-pcs.c b/gdb/arch/arm-get-next-pcs.c index 1e63267..3178bf3 100644 --- a/gdb/arch/arm-get-next-pcs.c +++ b/gdb/arch/arm-get-next-pcs.c @@ -49,7 +49,7 @@ static std::vector thumb_deal_with_atomic_sequence_raw (struct arm_get_next_pcs *self) { int byte_order_for_code = self->byte_order_for_code; - CORE_ADDR breaks[2] = {-1, -1}; + CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX}; CORE_ADDR pc = regcache_read_pc (self->regcache); CORE_ADDR loc = pc; unsigned short insn1, insn2; @@ -187,7 +187,7 @@ static std::vector arm_deal_with_atomic_sequence_raw (struct arm_get_next_pcs *self) { int byte_order_for_code = self->byte_order_for_code; - CORE_ADDR breaks[2] = {-1, -1}; + CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX}; CORE_ADDR pc = regcache_read_pc (self->regcache); CORE_ADDR loc = pc; unsigned int insn; diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c index 37a12a9..5e0a606 100644 --- a/gdb/mips-tdep.c +++ b/gdb/mips-tdep.c @@ -3910,7 +3910,7 @@ mips_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr) static std::vector mips_deal_with_atomic_sequence (struct gdbarch *gdbarch, CORE_ADDR pc) { - CORE_ADDR breaks[2] = {-1, -1}; + CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX}; CORE_ADDR loc = pc; CORE_ADDR branch_bp; /* Breakpoint at branch instruction's destination. */ ULONGEST insn; @@ -4013,7 +4013,7 @@ micromips_deal_with_atomic_sequence (struct gdbarch *gdbarch, { const int atomic_sequence_length = 16; /* Instruction sequence length. */ int last_breakpoint = 0; /* Defaults to 0 (no breakpoints placed). */ - CORE_ADDR breaks[2] = {-1, -1}; + CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX}; CORE_ADDR branch_bp = 0; /* Breakpoint at branch instruction's destination. */ CORE_ADDR loc = pc; diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c index e78de49..5a3e65f 100644 --- a/gdb/rs6000-tdep.c +++ b/gdb/rs6000-tdep.c @@ -989,7 +989,7 @@ ppc_deal_with_atomic_sequence (struct regcache *regcache) struct gdbarch *gdbarch = regcache->arch (); enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); CORE_ADDR pc = regcache_read_pc (regcache); - CORE_ADDR breaks[2] = {-1, -1}; + CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX}; CORE_ADDR loc = pc; CORE_ADDR closing_insn; /* Instruction that closes the atomic sequence. */ int insn = read_memory_integer (loc, PPC_INSN_SIZE, byte_order); -- 2.7.4