From 707b6e94b88a5bac96157d03756f359060458d08 Mon Sep 17 00:00:00 2001 From: Cullen Rhodes Date: Tue, 2 May 2023 14:30:02 +0000 Subject: [PATCH] [mlir][SparseTensor][ArmSVE] Fix missing lli substitutions The MLIR SVE integration tests are now enabled in the clang-aarch64-full-2stage buildbot under emulation (QEMU) and two of the sparse integration tests are failing [1]: * mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sorted_coo.mlir * mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_spmm.mlir The reason for this is the SVE RUN lines use plain 'lli' rather than the '%lli_host_or_aarch64_cmd' substitution that's necessary to run under emulation. The CI doesn't support SVE so the tests will SIGILL unless run under emulation. I should note the logs don't show a SIGILL, only the non-descript: FileCheck error: '' is empty. but I expect this is what's actually happening. https://lab.llvm.org/buildbot/#/builders/179/builds/6051/steps/12/logs/stdio --- mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sorted_coo.mlir | 2 +- mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_spmm.mlir | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sorted_coo.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sorted_coo.mlir index 3ebd9df..224dedf 100644 --- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sorted_coo.mlir +++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sorted_coo.mlir @@ -18,7 +18,7 @@ // REDEFINE: %{option} = "enable-runtime-library=false enable-buffer-initialization=true vl=4 enable-arm-sve=%ENABLE_VLA" // REDEFINE: %{run} = TENSOR0="%mlir_src_dir/test/Integration/data/wide.mtx" \ // REDEFINE: TENSOR1="%mlir_src_dir/test/Integration/data/mttkrp_b.tns" \ -// REDEFINE: lli \ +// REDEFINE: %lli_host_or_aarch64_cmd \ // REDEFINE: --entry-function=entry_lli \ // REDEFINE: --extra-module=%S/Inputs/main_for_lli.ll \ // REDEFINE: %VLA_ARCH_ATTR_OPTIONS \ diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_spmm.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_spmm.mlir index 190ba70..c32ae69 100644 --- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_spmm.mlir +++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_spmm.mlir @@ -20,7 +20,7 @@ // vectorization. // REDEFINE: %{option} = "enable-runtime-library=false vl=4 enable-arm-sve=%ENABLE_VLA" // REDEFINE: %{run} = TENSOR0="%mlir_src_dir/test/Integration/data/wide.mtx" \ -// REDEFINE: lli \ +// REDEFINE: %lli_host_or_aarch64_cmd \ // REDEFINE: --entry-function=entry_lli \ // REDEFINE: --extra-module=%S/Inputs/main_for_lli.ll \ // REDEFINE: %VLA_ARCH_ATTR_OPTIONS \ -- 2.7.4