From 701b6520f5c1154d886a2f201885aa1dc4cd9919 Mon Sep 17 00:00:00 2001 From: Harri Nieminen Date: Tue, 11 Apr 2023 23:16:41 +0300 Subject: [PATCH] r300: fix typos MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Reviewed-by: Marek Olšák Part-of: --- src/gallium/drivers/r300/compiler/r3xx_vertprog.c | 2 +- src/gallium/drivers/r300/compiler/radeon_compiler.c | 2 +- src/gallium/drivers/r300/compiler/radeon_dataflow.h | 2 +- src/gallium/drivers/r300/compiler/radeon_optimize.c | 2 +- src/gallium/drivers/r300/compiler/radeon_pair_schedule.c | 6 +++--- src/gallium/drivers/r300/compiler/radeon_program_tex.c | 2 +- src/gallium/drivers/r300/compiler/radeon_variable.c | 2 +- src/gallium/drivers/r300/r300_blit.c | 2 +- src/gallium/drivers/r300/r300_reg.h | 6 +++--- src/gallium/drivers/r300/r300_vs_draw.c | 2 +- 10 files changed, 14 insertions(+), 14 deletions(-) diff --git a/src/gallium/drivers/r300/compiler/r3xx_vertprog.c b/src/gallium/drivers/r300/compiler/r3xx_vertprog.c index f322785..075d319 100644 --- a/src/gallium/drivers/r300/compiler/r3xx_vertprog.c +++ b/src/gallium/drivers/r300/compiler/r3xx_vertprog.c @@ -816,7 +816,7 @@ void r3xx_compile_vertex_program(struct r300_vertex_program_compiler *c) { NULL, NULL } }; - /* Note: These passes have to be done seperately from ALU rewrite, + /* Note: These passes have to be done separately from ALU rewrite, * otherwise non-native ALU instructions with source conflits * or non-native modifiers will not be treated properly. */ diff --git a/src/gallium/drivers/r300/compiler/radeon_compiler.c b/src/gallium/drivers/r300/compiler/radeon_compiler.c index ab36513..b4b7398 100644 --- a/src/gallium/drivers/r300/compiler/radeon_compiler.c +++ b/src/gallium/drivers/r300/compiler/radeon_compiler.c @@ -415,7 +415,7 @@ static void print_stats(struct radeon_compiler * c) rc_get_stats(c, &s); /* Note that we print some dummy values for instruction categories that - * only the FS has, becasue shader-db's report.py wants all shaders to + * only the FS has, because shader-db's report.py wants all shaders to * have the same set. */ util_debug_message(c->debug, SHADER_INFO, "%s shader: %u inst, %u vinst, %u sinst, %u predicate, %u flowcontrol, %u loops, %u tex, %u presub, %u omod, %u temps, %u consts, %u lits", diff --git a/src/gallium/drivers/r300/compiler/radeon_dataflow.h b/src/gallium/drivers/r300/compiler/radeon_dataflow.h index 0c7bf8a..09e0a96 100644 --- a/src/gallium/drivers/r300/compiler/radeon_dataflow.h +++ b/src/gallium/drivers/r300/compiler/radeon_dataflow.h @@ -99,7 +99,7 @@ struct rc_reader_data { unsigned int ReadersReserved; struct rc_reader * Readers; - /* If this flag is enabled, rc_get_readers will exit as soon possbile + /* If this flag is enabled, rc_get_readers will exit as soon possible * after the Abort flag is set.*/ unsigned int ExitOnAbort; void * CbData; diff --git a/src/gallium/drivers/r300/compiler/radeon_optimize.c b/src/gallium/drivers/r300/compiler/radeon_optimize.c index 02a937c..f216998 100644 --- a/src/gallium/drivers/r300/compiler/radeon_optimize.c +++ b/src/gallium/drivers/r300/compiler/radeon_optimize.c @@ -658,7 +658,7 @@ static void presub_replace_inv( /** * PRESUB_INV: ADD TEMP[0], none.1, -TEMP[1] * Use the presubtract 1 - src0 for all readers of TEMP[0]. The first source - * of the add instruction must have the constatnt 1 swizzle. This function + * of the add instruction must have the constant 1 swizzle. This function * does not check const registers to see if their value is 1.0, so it should * be called after the constant_folding optimization. * @return diff --git a/src/gallium/drivers/r300/compiler/radeon_pair_schedule.c b/src/gallium/drivers/r300/compiler/radeon_pair_schedule.c index e232e93..428bf47 100644 --- a/src/gallium/drivers/r300/compiler/radeon_pair_schedule.c +++ b/src/gallium/drivers/r300/compiler/radeon_pair_schedule.c @@ -494,7 +494,7 @@ static void emit_all_tex(struct schedule_state * s, struct rc_instruction * befo * dst_full is an rgb instruction, meaning that it has a vector instruction(rgb) * but no scalar instruction (alpha). * @return 0 if merging the presubtract sources fails. - * @retrun 1 if merging the presubtract sources succeeds. + * @return 1 if merging the presubtract sources succeeds. */ static int merge_presub_sources( struct rc_pair_instruction * dst_full, @@ -571,7 +571,7 @@ static int merge_presub_sources( for(arg = 0; arg < info->NumSrcRegs; arg++) { /* If the arg does read both from rgb and alpha, then we need to rewrite * both sources and the code currently doesn't handle this. - * FIXME: This is definitelly solvable, however shader-db shows it is + * FIXME: This is definitely solvable, however shader-db shows it is * not worth the effort. */ if (rc_source_type_swz(dst_full->RGB.Arg[arg].Swizzle) & RC_SOURCE_ALPHA && @@ -844,7 +844,7 @@ static void is_rgb_to_alpha_possible( } /* Make sure the source only reads the register component that we - * are going to be convering from. It is OK if the instruction uses + * are going to be converting from. It is OK if the instruction uses * this component more than once. * XXX If the index we will be converting to is the same as the * current index, then it is OK to read from more than one component. diff --git a/src/gallium/drivers/r300/compiler/radeon_program_tex.c b/src/gallium/drivers/r300/compiler/radeon_program_tex.c index 4882527..9995d51 100644 --- a/src/gallium/drivers/r300/compiler/radeon_program_tex.c +++ b/src/gallium/drivers/r300/compiler/radeon_program_tex.c @@ -230,7 +230,7 @@ int radeonTransformTEX( else inst_add->U.I.SrcReg[0].Negate = inst_add->U.I.SrcReg[0].Negate ^ RC_MASK_XYZW; - /* This negates the whole expresion: */ + /* This negates the whole expression: */ if (comparefunc == RC_COMPARE_FUNC_LESS || comparefunc == RC_COMPARE_FUNC_GREATER || comparefunc == RC_COMPARE_FUNC_NOTEQUAL) { pass = 1; diff --git a/src/gallium/drivers/r300/compiler/radeon_variable.c b/src/gallium/drivers/r300/compiler/radeon_variable.c index 4c276a4..c07b20a 100644 --- a/src/gallium/drivers/r300/compiler/radeon_variable.c +++ b/src/gallium/drivers/r300/compiler/radeon_variable.c @@ -383,7 +383,7 @@ struct rc_list * rc_get_variables(struct radeon_compiler * c) * as the src1.xyz and src1.w of the instruction where the value is used are * in theory independent. They are not because the same register is written * also by the texture instruction in the other branch and TEX can't write xyz - * and w separatelly. + * and w separately. * * Therefore first search for RC_INSTRUCTION_NORMAL to create variables from * the texture instruction and than the pair instructions will be properly diff --git a/src/gallium/drivers/r300/r300_blit.c b/src/gallium/drivers/r300/r300_blit.c index 2cbdcac..681dc0c 100644 --- a/src/gallium/drivers/r300/r300_blit.c +++ b/src/gallium/drivers/r300/r300_blit.c @@ -629,7 +629,7 @@ static void r300_resource_copy_region(struct pipe_context *pipe, switch (util_format_get_blocksize(dst_templ.format)) { case 8: /* one 4x4 pixel block has 8 bytes. - * we set 1 pixel = 4 bytes ===> 1 block corrensponds to 2 pixels. */ + * we set 1 pixel = 4 bytes ===> 1 block corresponds to 2 pixels. */ dst_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM; dst_width0 = dst_width0 / 2; src_width0 = src_width0 / 2; diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 8058353..91a43b1 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -540,7 +540,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. * position takes place. * * Most likely this is used to ignore rest of the program in cases - * where group of verts arent visible. For some reason this "section" + * where group of verts aren't visible. For some reason this "section" * is sometimes accepted other instruction that have no relationship with * position calculations. */ @@ -1197,7 +1197,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. * My guess is that there are two bits for each zbias primitive * (FILL, LINE, POINT). * One to enable depth test and one for depth write. - * Yet this doesnt explain why depth writes work ... + * Yet this doesn't explain why depth writes work ... */ #define R300_SU_POLY_OFFSET_ENABLE 0x42B4 # define R300_FRONT_ENABLE (1 << 0) @@ -3497,7 +3497,7 @@ enum { /* Same as R300_PACKET3_3D_DRAW_INDX but without VAP_VTX_FMT */ #define R300_PACKET3_3D_DRAW_INDX_2 0x00003600 -/* Clears a portion of hierachical Z RAM +/* Clears a portion of hierarchical Z RAM * 3 dword parameters * 0. START * 1. COUNT: 13:0 (max is 0x3FFF) diff --git a/src/gallium/drivers/r300/r300_vs_draw.c b/src/gallium/drivers/r300/r300_vs_draw.c index 73002da..a94a5c9 100644 --- a/src/gallium/drivers/r300/r300_vs_draw.c +++ b/src/gallium/drivers/r300/r300_vs_draw.c @@ -24,7 +24,7 @@ * **************************************************************************/ -/* This file contains the vertex shader tranformations for SW TCL needed +/* This file contains the vertex shader transformations for SW TCL needed * to overcome the limitations of the r300 rasterizer. * * Transformations: -- 2.7.4