From 700e24941c5ef6c785cb45f309dd0878e7a08c67 Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Wed, 15 Feb 2023 19:21:55 +0800 Subject: [PATCH] ac/nir: init tess factor location with IO remap MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Radeonsi is going to use nir tess factor write, so need to remap tess factor location. RADV set tess factor driver location to be 0 and 1 in get_linked_variable_location(). While radeonsi also set them to be 0 and 1 in st->map_io aka. si_shader_io_get_unique_index_patch(). We could just set them to be 0 and 1 at the beginning of ac_nir_lower_hs_outputs_to_mem(), but in order to keep the location map at the same place, we still do this in lower_hs_output_store(). Acked-by: Marek Olšák Reviewed-by: Timur Kristóf Signed-off-by: Qiang Yu Part-of: --- src/amd/common/ac_nir_lower_tess_io_to_mem.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/src/amd/common/ac_nir_lower_tess_io_to_mem.c b/src/amd/common/ac_nir_lower_tess_io_to_mem.c index 2f0587f..450bb96 100644 --- a/src/amd/common/ac_nir_lower_tess_io_to_mem.c +++ b/src/amd/common/ac_nir_lower_tess_io_to_mem.c @@ -443,6 +443,19 @@ lower_hs_output_store(nir_builder *b, bool write_to_lds = (is_tess_factor && !st->tcs_pass_tessfactors_by_reg) || tcs_output_needs_lds(intrin, b->shader); + /* Remember tess factor location so that we can load them from LDS and/or + * store them to VMEM when hs_emit_write_tess_factors(). + */ + if (is_tess_factor) { + unsigned mapped_location = + st->map_io ? st->map_io(semantics.location) : nir_intrinsic_base(intrin); + + if (semantics.location == VARYING_SLOT_TESS_LEVEL_INNER) + st->tcs_tess_lvl_in_loc = mapped_location * 16u; + else + st->tcs_tess_lvl_out_loc = mapped_location * 16u; + } + if (write_to_vmem) { nir_ssa_def *vmem_off = intrin->intrinsic == nir_intrinsic_store_per_vertex_output ? hs_per_vertex_output_vmem_offset(b, st, intrin) @@ -457,12 +470,6 @@ lower_hs_output_store(nir_builder *b, } if (write_to_lds) { - /* Remember driver location of tess factors, so we can read them later */ - if (semantics.location == VARYING_SLOT_TESS_LEVEL_INNER) - st->tcs_tess_lvl_in_loc = nir_intrinsic_base(intrin) * 16u; - else if (semantics.location == VARYING_SLOT_TESS_LEVEL_OUTER) - st->tcs_tess_lvl_out_loc = nir_intrinsic_base(intrin) * 16u; - nir_ssa_def *lds_off = hs_output_lds_offset(b, st, intrin); nir_store_shared(b, store_val, lds_off, .write_mask = write_mask, .align_mul = 16u, .align_offset = (component * 4u) % 16u); -- 2.7.4