From 70037005e704e2200f4ef7b8a80f0ab91d587dc3 Mon Sep 17 00:00:00 2001 From: krebbel Date: Thu, 9 Sep 2010 11:30:15 +0000 Subject: [PATCH] 2010-09-09 Ulrich Weigand * config/s390/s390.c (legitimate_reload_constant_p): Accept floating- point zero operands that fit into a single GPR. (s390_preferred_reload_class): Ensure we only return general-purpose register classes. * config/s390/s390.md ("*mov_64dfp"): Use lghi to load floating-point zero operands into GPRs. ("*mov_64"): Likewise. ("mov"): Likewise using lhi. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@164076 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 11 +++++++++++ gcc/config/s390/s390.c | 19 ++++++++++++++----- gcc/config/s390/s390.md | 33 ++++++++++++++++++--------------- 3 files changed, 43 insertions(+), 20 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8e05709..7fd3efd 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,16 @@ 2010-09-09 Ulrich Weigand + * config/s390/s390.c (legitimate_reload_constant_p): Accept floating- + point zero operands that fit into a single GPR. + (s390_preferred_reload_class): Ensure we only return general-purpose + register classes. + * config/s390/s390.md ("*mov_64dfp"): Use lghi to load + floating-point zero operands into GPRs. + ("*mov_64"): Likewise. + ("mov"): Likewise using lhi. + +2010-09-09 Ulrich Weigand + * config/s390/s390.c (s390_symref_operand_p): Return false for literal pool references. (s390_check_qrst_address): Update caller. diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c index 32e5197..ee17153 100644 --- a/gcc/config/s390/s390.c +++ b/gcc/config/s390/s390.c @@ -2815,6 +2815,12 @@ legitimate_reload_constant_p (rtx op) && larl_operand (op, VOIDmode)) return true; + /* Accept floating-point zero operands that fit into a single GPR. */ + if (GET_CODE (op) == CONST_DOUBLE + && s390_float_const_zero_p (op) + && GET_MODE_SIZE (GET_MODE (op)) <= UNITS_PER_WORD) + return true; + /* Accept double-word operands that can be split. */ if (GET_CODE (op) == CONST_INT && trunc_int_for_mode (INTVAL (op), word_mode) != INTVAL (op)) @@ -2838,13 +2844,16 @@ s390_preferred_reload_class (rtx op, enum reg_class rclass) { switch (GET_CODE (op)) { - /* Constants we cannot reload must be forced into the - literal pool. */ - + /* Constants we cannot reload into general registers + must be forced into the literal pool. */ case CONST_DOUBLE: case CONST_INT: - if (legitimate_reload_constant_p (op)) - return rclass; + if (reg_class_subset_p (GENERAL_REGS, rclass) + && legitimate_reload_constant_p (op)) + return GENERAL_REGS; + else if (reg_class_subset_p (ADDR_REGS, rclass) + && legitimate_reload_constant_p (op)) + return ADDR_REGS; else return NO_REGS; diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index f78af00..80cb43a 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -2042,9 +2042,9 @@ (define_insn "*mov_64dfp" [(set (match_operand:DD_DF 0 "nonimmediate_operand" - "=f,f,d,f,f,R,T,d, d,RT") + "=f,f,d,f,f,R,T,d,d, d,RT") (match_operand:DD_DF 1 "general_operand" - " f,d,f,R,T,f,f,d,RT, d"))] + " f,d,f,R,T,f,f,G,d,RT, d"))] "TARGET_DFP" "@ ldr\t%0,%1 @@ -2054,18 +2054,19 @@ ldy\t%0,%1 std\t%1,%0 stdy\t%1,%0 + lghi\t%0,0 lgr\t%0,%1 lg\t%0,%1 stg\t%1,%0" - [(set_attr "op_type" "RR,RRE,RRE,RX,RXY,RX,RXY,RRE,RXY,RXY") + [(set_attr "op_type" "RR,RRE,RRE,RX,RXY,RX,RXY,RI,RRE,RXY,RXY") (set_attr "type" "floaddf,floaddf,floaddf,floaddf,floaddf, - fstoredf,fstoredf,lr,load,store") - (set_attr "z10prop" "*,*,*,*,*,*,*,z10_fr_E1,z10_fwd_A3,z10_rec") + fstoredf,fstoredf,*,lr,load,store") + (set_attr "z10prop" "*,*,*,*,*,*,*,z10_fwd_A1,z10_fr_E1,z10_fwd_A3,z10_rec") ]) (define_insn "*mov_64" - [(set (match_operand:DD_DF 0 "nonimmediate_operand" "=f,f,f,R,T,d, d,RT") - (match_operand:DD_DF 1 "general_operand" "f,R,T,f,f,d,RT, d"))] + [(set (match_operand:DD_DF 0 "nonimmediate_operand" "=f,f,f,R,T,d,d, d,RT") + (match_operand:DD_DF 1 "general_operand" "f,R,T,f,f,G,d,RT, d"))] "TARGET_ZARCH" "@ ldr\t%0,%1 @@ -2073,13 +2074,14 @@ ldy\t%0,%1 std\t%1,%0 stdy\t%1,%0 + lghi\t%0,0 lgr\t%0,%1 lg\t%0,%1 stg\t%1,%0" - [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RRE,RXY,RXY") + [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RI,RRE,RXY,RXY") (set_attr "type" "fload,fload,fload, - fstore,fstore,lr,load,store") - (set_attr "z10prop" "*,*,*,*,*,z10_fr_E1,z10_fwd_A3,z10_rec")]) + fstore,fstore,*,lr,load,store") + (set_attr "z10prop" "*,*,*,*,*,z10_fwd_A1,z10_fr_E1,z10_fwd_A3,z10_rec")]) (define_insn "*mov_31" [(set (match_operand:DD_DF 0 "nonimmediate_operand" @@ -2150,9 +2152,9 @@ (define_insn "mov" [(set (match_operand:SD_SF 0 "nonimmediate_operand" - "=f,f,f,R,T,d,d,d,R,T") + "=f,f,f,R,T,d,d,d,d,R,T") (match_operand:SD_SF 1 "general_operand" - " f,R,T,f,f,d,R,T,d,d"))] + " f,R,T,f,f,G,d,R,T,d,d"))] "" "@ ler\t%0,%1 @@ -2160,15 +2162,16 @@ ley\t%0,%1 ste\t%1,%0 stey\t%1,%0 + lhi\t%0,0 lr\t%0,%1 l\t%0,%1 ly\t%0,%1 st\t%1,%0 sty\t%1,%0" - [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RR,RX,RXY,RX,RXY") + [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RI,RR,RX,RXY,RX,RXY") (set_attr "type" "fload,fload,fload, - fstore,fstore,lr,load,load,store,store") - (set_attr "z10prop" "*,*,*,*,*,z10_fr_E1,z10_fwd_A3,z10_fwd_A3,z10_rec,z10_rec")]) + fstore,fstore,*,lr,load,load,store,store") + (set_attr "z10prop" "*,*,*,*,*,z10_fwd_A1,z10_fr_E1,z10_fwd_A3,z10_fwd_A3,z10_rec,z10_rec")]) ; ; movcc instruction pattern -- 2.7.4