From 6f7310f2b450fa98642b4a8e76a52ea3837ee66c Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Mon, 17 Jan 2011 09:55:33 -0800 Subject: [PATCH] rx: Split cstoresi4 post-reload. This will allow elimination of the compare. From-SVN: r168920 --- gcc/ChangeLog | 5 +++++ gcc/config/rx/rx.c | 2 -- gcc/config/rx/rx.h | 2 -- gcc/config/rx/rx.md | 41 +++++++++++++++++++++++++++++------------ 4 files changed, 34 insertions(+), 16 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6636b51..a3d7e92 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2011-01-17 Richard Henderson + * config/rx/rx.c (rx_float_compare_mode): Remove. + * config/rx/rx.h (rx_float_compare_mode): Remove. + * config/rx/rx.md (cstoresi4): Split after reload. + (*sccc): New pattern. + * config/rx/predicates.md (label_ref_operand): New. (rx_z_comparison_operator): New. (rx_zs_comparison_operator): New. diff --git a/gcc/config/rx/rx.c b/gcc/config/rx/rx.c index a2ff95e..992c585 100644 --- a/gcc/config/rx/rx.c +++ b/gcc/config/rx/rx.c @@ -363,8 +363,6 @@ rx_assemble_integer (rtx x, unsigned int size, int is_aligned) } -int rx_float_compare_mode; - /* Handles the insertion of a single operand into the assembler output. The % directives supported are: diff --git a/gcc/config/rx/rx.h b/gcc/config/rx/rx.h index d26c80c..e2c8641 100644 --- a/gcc/config/rx/rx.h +++ b/gcc/config/rx/rx.h @@ -595,8 +595,6 @@ typedef unsigned int CUMULATIVE_ARGS; they contain are always computed between two same-section symbols. */ #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic) -extern int rx_float_compare_mode; - /* This is a version of REG_P that also returns TRUE for SUBREGs. */ #define RX_REG_P(rtl) (REG_P (rtl) || GET_CODE (rtl) == SUBREG) diff --git a/gcc/config/rx/rx.md b/gcc/config/rx/rx.md index c2161a2..f9a7c02 100644 --- a/gcc/config/rx/rx.md +++ b/gcc/config/rx/rx.md @@ -706,20 +706,37 @@ (set_attr "timings" "45")] ;; The timing is a guesstimate average timing. ) -;; FIXME: Add memory destination options ? -(define_insn "cstoresi4" - [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r,r") +(define_insn_and_split "cstoresi4" + [(set (match_operand:SI 0 "register_operand" "=r") (match_operator:SI 1 "comparison_operator" - [(match_operand:SI 2 "register_operand" "r,r,r,r,r,r,r") - (match_operand:SI 3 "rx_source_operand" "r,Uint04,Int08,Sint16,Sint24,i,Q")])) - (clobber (reg:CC CC_REG))] ;; Because the cc flags are set based on comparing ops 2 & 3 not the value in op 0. + [(match_operand:SI 2 "register_operand" "r") + (match_operand:SI 3 "rx_source_operand" "riQ")])) + (clobber (reg:CC CC_REG))] "" - { - rx_float_compare_mode = false; - return "cmp\t%Q3, %Q2\n\tsc%B1.L\t%0"; - } - [(set_attr "timings" "22,22,22,22,22,22,44") - (set_attr "length" "5,5,6,7,8,9,8")] + "#" + "reload_completed" + [(const_int 0)] +{ + rtx flags, x; + + flags = gen_rtx_REG (CCmode, CC_REG); + x = gen_rtx_COMPARE (CCmode, operands[2], operands[3]); + x = gen_rtx_SET (VOIDmode, flags, x); + emit_insn (x); + + x = gen_rtx_fmt_ee (GET_CODE (operands[1]), SImode, flags, const0_rtx); + x = gen_rtx_SET (VOIDmode, operands[0], x); + emit_insn (x); + DONE; +}) + +(define_insn "*sccc" + [(set (match_operand:SI 0 "register_operand" "=r") + (match_operator:SI 1 "comparison_operator" + [(reg CC_REG) (const_int 0)]))] + "reload_completed" + "sc%B1.L\t%0" + [(set_attr "length" "3")] ) (define_expand "movsicc" -- 2.7.4