From 6f48e2bee15c484c4a4685712c6ba1f379ef6853 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Sun, 27 Sep 2015 00:52:32 +0200 Subject: [PATCH] winsys/amdgpu: add winsys function cs_get_buffer_list MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit For debugging. Reviewed-by: Michel Dänzer --- src/gallium/drivers/radeon/radeon_winsys.h | 16 ++++++++++++++++ src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 19 +++++++++++++++++++ src/gallium/winsys/amdgpu/drm/amdgpu_cs.h | 1 + 3 files changed, 36 insertions(+) diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h index 3049852..b91e1ad 100644 --- a/src/gallium/drivers/radeon/radeon_winsys.h +++ b/src/gallium/drivers/radeon/radeon_winsys.h @@ -368,6 +368,12 @@ struct radeon_surf { uint32_t num_banks; }; +struct radeon_bo_list_item { + struct pb_buffer *buf; + uint64_t vm_address; + uint64_t priority_usage; /* mask of (1 << RADEON_PRIO_*) */ +}; + struct radeon_winsys { /** * The screen object this winsys was created for @@ -642,6 +648,16 @@ struct radeon_winsys { boolean (*cs_memory_below_limit)(struct radeon_winsys_cs *cs, uint64_t vram, uint64_t gtt); /** + * Return the buffer list. + * + * \param cs Command stream + * \param list Returned buffer list. Set to NULL to query the count only. + * \return The buffer count. + */ + unsigned (*cs_get_buffer_list)(struct radeon_winsys_cs *cs, + struct radeon_bo_list_item *list); + + /** * Flush a command stream. * * \param cs A command stream to flush. diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c index 19a2004..48f76cf 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c @@ -416,6 +416,7 @@ static unsigned amdgpu_add_buffer(struct amdgpu_cs *cs, if (i >= 0) { buffer = &cs->buffers[i]; + buffer->priority_usage |= 1llu << priority; buffer->usage |= usage; *added_domains = domains & ~buffer->domains; buffer->domains |= domains; @@ -445,6 +446,7 @@ static unsigned amdgpu_add_buffer(struct amdgpu_cs *cs, p_atomic_inc(&bo->num_cs_references); buffer = &cs->buffers[cs->num_buffers]; buffer->bo = bo; + buffer->priority_usage = 1llu << priority; buffer->usage = usage; buffer->domains = domains; @@ -500,6 +502,22 @@ static boolean amdgpu_cs_memory_below_limit(struct radeon_winsys_cs *rcs, uint64 return status; } +static unsigned amdgpu_cs_get_buffer_list(struct radeon_winsys_cs *rcs, + struct radeon_bo_list_item *list) +{ + struct amdgpu_cs *cs = amdgpu_cs(rcs); + int i; + + if (list) { + for (i = 0; i < cs->num_buffers; i++) { + pb_reference(&list[i].buf, &cs->buffers[i].bo->base); + list[i].vm_address = cs->buffers[i].bo->va; + list[i].priority_usage = cs->buffers[i].priority_usage; + } + } + return cs->num_buffers; +} + static void amdgpu_cs_do_submission(struct amdgpu_cs *cs, struct pipe_fence_handle **out_fence) { @@ -686,6 +704,7 @@ void amdgpu_cs_init_functions(struct amdgpu_winsys *ws) ws->base.cs_lookup_buffer = amdgpu_cs_lookup_buffer; ws->base.cs_validate = amdgpu_cs_validate; ws->base.cs_memory_below_limit = amdgpu_cs_memory_below_limit; + ws->base.cs_get_buffer_list = amdgpu_cs_get_buffer_list; ws->base.cs_flush = amdgpu_cs_flush; ws->base.cs_is_buffer_referenced = amdgpu_bo_is_referenced; ws->base.cs_sync_flush = amdgpu_cs_sync_flush; diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h index 1955fe2..bae5d73 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h @@ -45,6 +45,7 @@ struct amdgpu_ctx { struct amdgpu_cs_buffer { struct amdgpu_winsys_bo *bo; + uint64_t priority_usage; enum radeon_bo_usage usage; enum radeon_bo_domain domains; }; -- 2.7.4