From 6ef32bf2aff1e4ebcf8d8f82b297ab8f28961e2d Mon Sep 17 00:00:00 2001 From: James Y Knight Date: Fri, 2 Sep 2016 20:29:11 +0000 Subject: [PATCH] [Sparc] Mark i128 shift libcalls unavailable in 32-bit mode. Recently, llvm wants to emit calls to these functions, while it didn't seem to be an issue before. Not sure why. Nor do I know why only these three are important to disable, out of all of the i128 libcalls. Nevertheless, many other targets have this snippet of code, so, just copying it to sparc as well, to unbreak things. llvm-svn: 280537 --- llvm/lib/Target/Sparc/SparcISelLowering.cpp | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp b/llvm/lib/Target/Sparc/SparcISelLowering.cpp index 3d74344..5421aef 100644 --- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp +++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp @@ -1641,6 +1641,13 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM, setOperationAction(ISD::ATOMIC_STORE, MVT::i64, Custom); } + if (!Subtarget->is64Bit()) { + // These libcalls are not available in 32-bit. + setLibcallName(RTLIB::SHL_I128, nullptr); + setLibcallName(RTLIB::SRL_I128, nullptr); + setLibcallName(RTLIB::SRA_I128, nullptr); + } + if (!Subtarget->isV9()) { // SparcV8 does not have FNEGD and FABSD. setOperationAction(ISD::FNEG, MVT::f64, Custom); -- 2.7.4