From 6eea2b1b81a878b471d597f7fac8598240088898 Mon Sep 17 00:00:00 2001
From: bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Sun, 13 Mar 2005 09:55:49 +0000
Subject: [PATCH] add missing FORCE_RET (Paul Brook)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1329 c046a42c-6fe2-441c-8c8c-71466251a162
---
 target-i386/op.c      |  7 +++++++
 target-i386/ops_mem.h | 10 ++++++++++
 target-sparc/op.c     |  1 +
 3 files changed, 18 insertions(+)

diff --git a/target-i386/op.c b/target-i386/op.c
index dd9d7ba..dc0dcea 100644
--- a/target-i386/op.c
+++ b/target-i386/op.c
@@ -1842,11 +1842,13 @@ void OPPROTO op_fsts_ST0_A0(void)
 #else
     stfl(A0, (float)ST0);
 #endif
+    FORCE_RET();
 }
 
 void OPPROTO op_fstl_ST0_A0(void)
 {
     stfq(A0, (double)ST0);
+    FORCE_RET();
 }
 
 void OPPROTO op_fstt_ST0_A0(void)
@@ -1868,6 +1870,7 @@ void OPPROTO op_fist_ST0_A0(void)
     if (val != (int16_t)val)
         val = -32768;
     stw(A0, val);
+    FORCE_RET();
 }
 
 void OPPROTO op_fistl_ST0_A0(void)
@@ -1882,6 +1885,7 @@ void OPPROTO op_fistl_ST0_A0(void)
     d = ST0;
     val = lrint(d);
     stl(A0, val);
+    FORCE_RET();
 }
 
 void OPPROTO op_fistll_ST0_A0(void)
@@ -1896,6 +1900,7 @@ void OPPROTO op_fistll_ST0_A0(void)
     d = ST0;
     val = llrint(d);
     stq(A0, val);
+    FORCE_RET();
 }
 
 void OPPROTO op_fbld_ST0_A0(void)
@@ -2228,6 +2233,7 @@ void OPPROTO op_fnstsw_A0(void)
     int fpus;
     fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
     stw(A0, fpus);
+    FORCE_RET();
 }
 
 void OPPROTO op_fnstsw_EAX(void)
@@ -2240,6 +2246,7 @@ void OPPROTO op_fnstsw_EAX(void)
 void OPPROTO op_fnstcw_A0(void)
 {
     stw(A0, env->fpuc);
+    FORCE_RET();
 }
 
 void OPPROTO op_fldcw_A0(void)
diff --git a/target-i386/ops_mem.h b/target-i386/ops_mem.h
index 2e6ccc4..0002f0d 100644
--- a/target-i386/ops_mem.h
+++ b/target-i386/ops_mem.h
@@ -51,33 +51,39 @@ void OPPROTO glue(glue(op_ldl, MEMSUFFIX), _T1_A0)(void)
 void OPPROTO glue(glue(op_stb, MEMSUFFIX), _T0_A0)(void)
 {
     glue(stb, MEMSUFFIX)(A0, T0);
+    FORCE_RET();
 }
 
 void OPPROTO glue(glue(op_stw, MEMSUFFIX), _T0_A0)(void)
 {
     glue(stw, MEMSUFFIX)(A0, T0);
+    FORCE_RET();
 }
 
 void OPPROTO glue(glue(op_stl, MEMSUFFIX), _T0_A0)(void)
 {
     glue(stl, MEMSUFFIX)(A0, T0);
+    FORCE_RET();
 }
 
 #if 0
 void OPPROTO glue(glue(op_stb, MEMSUFFIX), _T1_A0)(void)
 {
     glue(stb, MEMSUFFIX)(A0, T1);
+    FORCE_RET();
 }
 #endif
 
 void OPPROTO glue(glue(op_stw, MEMSUFFIX), _T1_A0)(void)
 {
     glue(stw, MEMSUFFIX)(A0, T1);
+    FORCE_RET();
 }
 
 void OPPROTO glue(glue(op_stl, MEMSUFFIX), _T1_A0)(void)
 {
     glue(stl, MEMSUFFIX)(A0, T1);
+    FORCE_RET();
 }
 
 /* SSE/MMX support */
@@ -93,6 +99,7 @@ void OPPROTO glue(glue(op_stq, MEMSUFFIX), _env_A0)(void)
     uint64_t *p;
     p = (uint64_t *)((char *)env + PARAM1);
     glue(stq, MEMSUFFIX)(A0, *p);
+    FORCE_RET();
 }
 
 void OPPROTO glue(glue(op_ldo, MEMSUFFIX), _env_A0)(void)
@@ -109,6 +116,7 @@ void OPPROTO glue(glue(op_sto, MEMSUFFIX), _env_A0)(void)
     p = (XMMReg *)((char *)env + PARAM1);
     glue(stq, MEMSUFFIX)(A0, p->XMM_Q(0));
     glue(stq, MEMSUFFIX)(A0 + 8, p->XMM_Q(1));
+    FORCE_RET();
 }
 
 #ifdef TARGET_X86_64
@@ -135,11 +143,13 @@ void OPPROTO glue(glue(op_ldq, MEMSUFFIX), _T1_A0)(void)
 void OPPROTO glue(glue(op_stq, MEMSUFFIX), _T0_A0)(void)
 {
     glue(stq, MEMSUFFIX)(A0, T0);
+    FORCE_RET();
 }
 
 void OPPROTO glue(glue(op_stq, MEMSUFFIX), _T1_A0)(void)
 {
     glue(stq, MEMSUFFIX)(A0, T1);
+    FORCE_RET();
 }
 #endif
 
diff --git a/target-sparc/op.c b/target-sparc/op.c
index 7fa98f1..281917a 100644
--- a/target-sparc/op.c
+++ b/target-sparc/op.c
@@ -765,6 +765,7 @@ void OPPROTO op_eval_fbue(void)
 {
 // 0 or 3
     T2 = !(FFLAG_SET(FSR_FCC1) ^ FFLAG_SET(FSR_FCC0));
+    FORCE_RET();
 }
 
 void OPPROTO op_eval_fbge(void)
-- 
2.7.4