From 6eddc6dd5afcc6e52e9fb348b62929a30f187633 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Wed, 15 Mar 2023 04:02:28 -0400 Subject: [PATCH] ac/nir: use plural correctly in the ac_nir_export_parameters name Reviewed-by: Pierre-Eric Pelloux-Prayer Reviewed-by: Qiang Yu Part-of: --- src/amd/common/ac_nir.c | 38 +++++++++++++++++++------------------- src/amd/common/ac_nir.h | 14 +++++++------- src/amd/common/ac_nir_lower_ngg.c | 32 ++++++++++++++++---------------- 3 files changed, 42 insertions(+), 42 deletions(-) diff --git a/src/amd/common/ac_nir.c b/src/amd/common/ac_nir.c index 34e1463..fe9968a 100644 --- a/src/amd/common/ac_nir.c +++ b/src/amd/common/ac_nir.c @@ -251,13 +251,13 @@ ac_nir_export_position(nir_builder *b, } void -ac_nir_export_parameter(nir_builder *b, - const uint8_t *param_offsets, - uint64_t outputs_written, - uint16_t outputs_written_16bit, - nir_ssa_def *(*outputs)[4], - nir_ssa_def *(*outputs_16bit_lo)[4], - nir_ssa_def *(*outputs_16bit_hi)[4]) +ac_nir_export_parameters(nir_builder *b, + const uint8_t *param_offsets, + uint64_t outputs_written, + uint16_t outputs_written_16bit, + nir_ssa_def *(*outputs)[4], + nir_ssa_def *(*outputs_16bit_lo)[4], + nir_ssa_def *(*outputs_16bit_hi)[4]) { uint32_t exported_params = 0; @@ -607,12 +607,12 @@ ac_nir_create_gs_copy_shader(const nir_shader *gs_nir, force_vrs, export_outputs, outputs.data); if (has_param_exports) { - ac_nir_export_parameter(&b, param_offsets, - b.shader->info.outputs_written, - b.shader->info.outputs_written_16bit, - outputs.data, - outputs.data_16bit_lo, - outputs.data_16bit_hi); + ac_nir_export_parameters(&b, param_offsets, + b.shader->info.outputs_written, + b.shader->info.outputs_written_16bit, + outputs.data, + outputs.data_16bit_lo, + outputs.data_16bit_hi); } } @@ -716,12 +716,12 @@ ac_nir_lower_legacy_vs(nir_shader *nir, force_vrs, export_outputs, outputs.data); if (has_param_exports) { - ac_nir_export_parameter(&b, param_offsets, - nir->info.outputs_written, - nir->info.outputs_written_16bit, - outputs.data, - outputs.data_16bit_lo, - outputs.data_16bit_hi); + ac_nir_export_parameters(&b, param_offsets, + nir->info.outputs_written, + nir->info.outputs_written_16bit, + outputs.data, + outputs.data_16bit_lo, + outputs.data_16bit_hi); } nir_metadata_preserve(impl, preserved); diff --git a/src/amd/common/ac_nir.h b/src/amd/common/ac_nir.h index 2197282..d3eafbd 100644 --- a/src/amd/common/ac_nir.h +++ b/src/amd/common/ac_nir.h @@ -90,13 +90,13 @@ ac_nir_export_position(nir_builder *b, nir_ssa_def *(*outputs)[4]); void -ac_nir_export_parameter(nir_builder *b, - const uint8_t *param_offsets, - uint64_t outputs_written, - uint16_t outputs_written_16bit, - nir_ssa_def *(*outputs)[4], - nir_ssa_def *(*outputs_16bit_lo)[4], - nir_ssa_def *(*outputs_16bit_hi)[4]); +ac_nir_export_parameters(nir_builder *b, + const uint8_t *param_offsets, + uint64_t outputs_written, + uint16_t outputs_written_16bit, + nir_ssa_def *(*outputs)[4], + nir_ssa_def *(*outputs_16bit_lo)[4], + nir_ssa_def *(*outputs_16bit_hi)[4]); nir_ssa_def * ac_nir_calc_io_offset(nir_builder *b, diff --git a/src/amd/common/ac_nir_lower_ngg.c b/src/amd/common/ac_nir_lower_ngg.c index 9cf6fb7..22dd56a 100644 --- a/src/amd/common/ac_nir_lower_ngg.c +++ b/src/amd/common/ac_nir_lower_ngg.c @@ -2434,11 +2434,11 @@ ac_nir_lower_ngg_nogs(nir_shader *shader, const ac_nir_lower_ngg_options *option options->vs_output_param_offset); } } else { - ac_nir_export_parameter(b, options->vs_output_param_offset, - shader->info.outputs_written, - shader->info.outputs_written_16bit, - state.outputs, state.outputs_16bit_lo, - state.outputs_16bit_hi); + ac_nir_export_parameters(b, options->vs_output_param_offset, + shader->info.outputs_written, + shader->info.outputs_written_16bit, + state.outputs, state.outputs_16bit_lo, + state.outputs_16bit_hi); } } @@ -2952,11 +2952,11 @@ ngg_gs_export_vertices(nir_builder *b, nir_ssa_def *max_num_out_vtx, nir_ssa_def s->options->vs_output_param_offset); } } else { - ac_nir_export_parameter(b, s->options->vs_output_param_offset, - b->shader->info.outputs_written, - b->shader->info.outputs_written_16bit, - s->outputs, s->outputs_16bit_lo, - s->outputs_16bit_hi); + ac_nir_export_parameters(b, s->options->vs_output_param_offset, + b->shader->info.outputs_written, + b->shader->info.outputs_written_16bit, + s->outputs, s->outputs_16bit_lo, + s->outputs_16bit_hi); } } } @@ -4263,9 +4263,9 @@ emit_ms_finale(nir_builder *b, lower_ngg_ms_state *s) s->per_vertex_outputs, s->outputs); if (s->has_param_exports) { - ac_nir_export_parameter(b, s->vs_output_param_offset, - s->per_vertex_outputs, 0, - s->outputs, NULL, NULL); + ac_nir_export_parameters(b, s->vs_output_param_offset, + s->per_vertex_outputs, 0, + s->outputs, NULL, NULL); } } nir_pop_if(b, if_has_output_vertex); @@ -4324,9 +4324,9 @@ emit_ms_finale(nir_builder *b, lower_ngg_ms_state *s) ms_emit_primitive_export(b, prim_exp_arg, per_primitive_outputs, s); - ac_nir_export_parameter(b, s->vs_output_param_offset, - per_primitive_outputs, 0, - s->outputs, NULL, NULL); + ac_nir_export_parameters(b, s->vs_output_param_offset, + per_primitive_outputs, 0, + s->outputs, NULL, NULL); } nir_pop_if(b, if_has_output_primitive); } -- 2.7.4