From 6e8bcaafbaa4b55099f632d46ce497cc3f0e546d Mon Sep 17 00:00:00 2001 From: Jessica Clarke Date: Fri, 3 Mar 2023 20:18:18 +0000 Subject: [PATCH] [RISCV][NFC] Unify CHECK lines for jumptable.ll @below_threshold test These are all identical across XLEN and code model since they're not using a jump table, so unify them rather than having multiple copies. --- llvm/test/CodeGen/RISCV/jumptable.ll | 166 ++++++++--------------------------- 1 file changed, 35 insertions(+), 131 deletions(-) diff --git a/llvm/test/CodeGen/RISCV/jumptable.ll b/llvm/test/CodeGen/RISCV/jumptable.ll index 5bb489f..9984d45 100644 --- a/llvm/test/CodeGen/RISCV/jumptable.ll +++ b/llvm/test/CodeGen/RISCV/jumptable.ll @@ -1,141 +1,45 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=riscv32 -code-model=small -verify-machineinstrs < %s \ -; RUN: | FileCheck %s -check-prefix=RV32I-SMALL +; RUN: | FileCheck %s -check-prefixes=CHECK,RV32I-SMALL ; RUN: llc -mtriple=riscv32 -code-model=medium -verify-machineinstrs < %s \ -; RUN: | FileCheck %s -check-prefix=RV32I-MEDIUM +; RUN: | FileCheck %s -check-prefixes=CHECK,RV32I-MEDIUM ; RUN: llc -mtriple=riscv64 -code-model=small -verify-machineinstrs < %s \ -; RUN: | FileCheck %s -check-prefix=RV64I-SMALL +; RUN: | FileCheck %s -check-prefixes=CHECK,RV64I-SMALL ; RUN: llc -mtriple=riscv64 -code-model=medium -verify-machineinstrs < %s \ -; RUN: | FileCheck %s -check-prefix=RV64I-MEDIUM +; RUN: | FileCheck %s -check-prefixes=CHECK,RV64I-MEDIUM define void @below_threshold(i32 signext %in, ptr %out) nounwind { -; RV32I-SMALL-LABEL: below_threshold: -; RV32I-SMALL: # %bb.0: # %entry -; RV32I-SMALL-NEXT: li a2, 2 -; RV32I-SMALL-NEXT: blt a2, a0, .LBB0_4 -; RV32I-SMALL-NEXT: # %bb.1: # %entry -; RV32I-SMALL-NEXT: li a2, 1 -; RV32I-SMALL-NEXT: beq a0, a2, .LBB0_7 -; RV32I-SMALL-NEXT: # %bb.2: # %entry -; RV32I-SMALL-NEXT: li a2, 2 -; RV32I-SMALL-NEXT: bne a0, a2, .LBB0_10 -; RV32I-SMALL-NEXT: # %bb.3: # %bb2 -; RV32I-SMALL-NEXT: li a0, 3 -; RV32I-SMALL-NEXT: j .LBB0_9 -; RV32I-SMALL-NEXT: .LBB0_4: # %entry -; RV32I-SMALL-NEXT: li a2, 3 -; RV32I-SMALL-NEXT: beq a0, a2, .LBB0_8 -; RV32I-SMALL-NEXT: # %bb.5: # %entry -; RV32I-SMALL-NEXT: li a2, 4 -; RV32I-SMALL-NEXT: bne a0, a2, .LBB0_10 -; RV32I-SMALL-NEXT: # %bb.6: # %bb4 -; RV32I-SMALL-NEXT: li a0, 1 -; RV32I-SMALL-NEXT: j .LBB0_9 -; RV32I-SMALL-NEXT: .LBB0_7: # %bb1 -; RV32I-SMALL-NEXT: li a0, 4 -; RV32I-SMALL-NEXT: j .LBB0_9 -; RV32I-SMALL-NEXT: .LBB0_8: # %bb3 -; RV32I-SMALL-NEXT: li a0, 2 -; RV32I-SMALL-NEXT: .LBB0_9: # %exit -; RV32I-SMALL-NEXT: sw a0, 0(a1) -; RV32I-SMALL-NEXT: .LBB0_10: # %exit -; RV32I-SMALL-NEXT: ret -; -; RV32I-MEDIUM-LABEL: below_threshold: -; RV32I-MEDIUM: # %bb.0: # %entry -; RV32I-MEDIUM-NEXT: li a2, 2 -; RV32I-MEDIUM-NEXT: blt a2, a0, .LBB0_4 -; RV32I-MEDIUM-NEXT: # %bb.1: # %entry -; RV32I-MEDIUM-NEXT: li a2, 1 -; RV32I-MEDIUM-NEXT: beq a0, a2, .LBB0_7 -; RV32I-MEDIUM-NEXT: # %bb.2: # %entry -; RV32I-MEDIUM-NEXT: li a2, 2 -; RV32I-MEDIUM-NEXT: bne a0, a2, .LBB0_10 -; RV32I-MEDIUM-NEXT: # %bb.3: # %bb2 -; RV32I-MEDIUM-NEXT: li a0, 3 -; RV32I-MEDIUM-NEXT: j .LBB0_9 -; RV32I-MEDIUM-NEXT: .LBB0_4: # %entry -; RV32I-MEDIUM-NEXT: li a2, 3 -; RV32I-MEDIUM-NEXT: beq a0, a2, .LBB0_8 -; RV32I-MEDIUM-NEXT: # %bb.5: # %entry -; RV32I-MEDIUM-NEXT: li a2, 4 -; RV32I-MEDIUM-NEXT: bne a0, a2, .LBB0_10 -; RV32I-MEDIUM-NEXT: # %bb.6: # %bb4 -; RV32I-MEDIUM-NEXT: li a0, 1 -; RV32I-MEDIUM-NEXT: j .LBB0_9 -; RV32I-MEDIUM-NEXT: .LBB0_7: # %bb1 -; RV32I-MEDIUM-NEXT: li a0, 4 -; RV32I-MEDIUM-NEXT: j .LBB0_9 -; RV32I-MEDIUM-NEXT: .LBB0_8: # %bb3 -; RV32I-MEDIUM-NEXT: li a0, 2 -; RV32I-MEDIUM-NEXT: .LBB0_9: # %exit -; RV32I-MEDIUM-NEXT: sw a0, 0(a1) -; RV32I-MEDIUM-NEXT: .LBB0_10: # %exit -; RV32I-MEDIUM-NEXT: ret -; -; RV64I-SMALL-LABEL: below_threshold: -; RV64I-SMALL: # %bb.0: # %entry -; RV64I-SMALL-NEXT: li a2, 2 -; RV64I-SMALL-NEXT: blt a2, a0, .LBB0_4 -; RV64I-SMALL-NEXT: # %bb.1: # %entry -; RV64I-SMALL-NEXT: li a2, 1 -; RV64I-SMALL-NEXT: beq a0, a2, .LBB0_7 -; RV64I-SMALL-NEXT: # %bb.2: # %entry -; RV64I-SMALL-NEXT: li a2, 2 -; RV64I-SMALL-NEXT: bne a0, a2, .LBB0_10 -; RV64I-SMALL-NEXT: # %bb.3: # %bb2 -; RV64I-SMALL-NEXT: li a0, 3 -; RV64I-SMALL-NEXT: j .LBB0_9 -; RV64I-SMALL-NEXT: .LBB0_4: # %entry -; RV64I-SMALL-NEXT: li a2, 3 -; RV64I-SMALL-NEXT: beq a0, a2, .LBB0_8 -; RV64I-SMALL-NEXT: # %bb.5: # %entry -; RV64I-SMALL-NEXT: li a2, 4 -; RV64I-SMALL-NEXT: bne a0, a2, .LBB0_10 -; RV64I-SMALL-NEXT: # %bb.6: # %bb4 -; RV64I-SMALL-NEXT: li a0, 1 -; RV64I-SMALL-NEXT: j .LBB0_9 -; RV64I-SMALL-NEXT: .LBB0_7: # %bb1 -; RV64I-SMALL-NEXT: li a0, 4 -; RV64I-SMALL-NEXT: j .LBB0_9 -; RV64I-SMALL-NEXT: .LBB0_8: # %bb3 -; RV64I-SMALL-NEXT: li a0, 2 -; RV64I-SMALL-NEXT: .LBB0_9: # %exit -; RV64I-SMALL-NEXT: sw a0, 0(a1) -; RV64I-SMALL-NEXT: .LBB0_10: # %exit -; RV64I-SMALL-NEXT: ret -; -; RV64I-MEDIUM-LABEL: below_threshold: -; RV64I-MEDIUM: # %bb.0: # %entry -; RV64I-MEDIUM-NEXT: li a2, 2 -; RV64I-MEDIUM-NEXT: blt a2, a0, .LBB0_4 -; RV64I-MEDIUM-NEXT: # %bb.1: # %entry -; RV64I-MEDIUM-NEXT: li a2, 1 -; RV64I-MEDIUM-NEXT: beq a0, a2, .LBB0_7 -; RV64I-MEDIUM-NEXT: # %bb.2: # %entry -; RV64I-MEDIUM-NEXT: li a2, 2 -; RV64I-MEDIUM-NEXT: bne a0, a2, .LBB0_10 -; RV64I-MEDIUM-NEXT: # %bb.3: # %bb2 -; RV64I-MEDIUM-NEXT: li a0, 3 -; RV64I-MEDIUM-NEXT: j .LBB0_9 -; RV64I-MEDIUM-NEXT: .LBB0_4: # %entry -; RV64I-MEDIUM-NEXT: li a2, 3 -; RV64I-MEDIUM-NEXT: beq a0, a2, .LBB0_8 -; RV64I-MEDIUM-NEXT: # %bb.5: # %entry -; RV64I-MEDIUM-NEXT: li a2, 4 -; RV64I-MEDIUM-NEXT: bne a0, a2, .LBB0_10 -; RV64I-MEDIUM-NEXT: # %bb.6: # %bb4 -; RV64I-MEDIUM-NEXT: li a0, 1 -; RV64I-MEDIUM-NEXT: j .LBB0_9 -; RV64I-MEDIUM-NEXT: .LBB0_7: # %bb1 -; RV64I-MEDIUM-NEXT: li a0, 4 -; RV64I-MEDIUM-NEXT: j .LBB0_9 -; RV64I-MEDIUM-NEXT: .LBB0_8: # %bb3 -; RV64I-MEDIUM-NEXT: li a0, 2 -; RV64I-MEDIUM-NEXT: .LBB0_9: # %exit -; RV64I-MEDIUM-NEXT: sw a0, 0(a1) -; RV64I-MEDIUM-NEXT: .LBB0_10: # %exit -; RV64I-MEDIUM-NEXT: ret +; CHECK-LABEL: below_threshold: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: li a2, 2 +; CHECK-NEXT: blt a2, a0, .LBB0_4 +; CHECK-NEXT: # %bb.1: # %entry +; CHECK-NEXT: li a2, 1 +; CHECK-NEXT: beq a0, a2, .LBB0_7 +; CHECK-NEXT: # %bb.2: # %entry +; CHECK-NEXT: li a2, 2 +; CHECK-NEXT: bne a0, a2, .LBB0_10 +; CHECK-NEXT: # %bb.3: # %bb2 +; CHECK-NEXT: li a0, 3 +; CHECK-NEXT: j .LBB0_9 +; CHECK-NEXT: .LBB0_4: # %entry +; CHECK-NEXT: li a2, 3 +; CHECK-NEXT: beq a0, a2, .LBB0_8 +; CHECK-NEXT: # %bb.5: # %entry +; CHECK-NEXT: li a2, 4 +; CHECK-NEXT: bne a0, a2, .LBB0_10 +; CHECK-NEXT: # %bb.6: # %bb4 +; CHECK-NEXT: li a0, 1 +; CHECK-NEXT: j .LBB0_9 +; CHECK-NEXT: .LBB0_7: # %bb1 +; CHECK-NEXT: li a0, 4 +; CHECK-NEXT: j .LBB0_9 +; CHECK-NEXT: .LBB0_8: # %bb3 +; CHECK-NEXT: li a0, 2 +; CHECK-NEXT: .LBB0_9: # %exit +; CHECK-NEXT: sw a0, 0(a1) +; CHECK-NEXT: .LBB0_10: # %exit +; CHECK-NEXT: ret entry: switch i32 %in, label %exit [ i32 1, label %bb1 -- 2.7.4