From 6c83a68ebc381b46a4226c0ebd060cbc0d3f8056 Mon Sep 17 00:00:00 2001 From: Sagar Ghuge Date: Wed, 27 Mar 2019 17:07:01 -0700 Subject: [PATCH] intel/disasm: Disassemble JIP offset for while Signed-off-by: Sagar Ghuge Reviewed-by: Anuj Phogat Reviewed-by: Matt Turner --- src/intel/compiler/brw_disasm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c index 04efa96..e1cc0f4 100644 --- a/src/intel/compiler/brw_disasm.c +++ b/src/intel/compiler/brw_disasm.c @@ -1661,7 +1661,8 @@ brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo, format(file, "Pop: %"PRIu64, brw_inst_gen4_pop_count(devinfo, inst)); } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_IF || opcode == BRW_OPCODE_IFF || - opcode == BRW_OPCODE_HALT)) { + opcode == BRW_OPCODE_HALT || + opcode == BRW_OPCODE_WHILE)) { pad(file, 16); format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst)); } else if (devinfo->gen < 6 && opcode == BRW_OPCODE_ENDIF) { -- 2.7.4