From 6c3e38522acf3e40097c0a8982b8dbd487867ad3 Mon Sep 17 00:00:00 2001 From: Joerg Sonnenberger Date: Mon, 4 Aug 2014 21:28:22 +0000 Subject: [PATCH] tlbre / tlbwe / tlbsx / tlbsx. variants for the PPC 4xx CPUs. llvm-svn: 214784 --- llvm/lib/Target/PowerPC/PPCInstrFormats.td | 16 +++++++++++ llvm/lib/Target/PowerPC/PPCInstrInfo.td | 23 +++++++++++++++ .../MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt | 15 ++++++++++ llvm/test/MC/PowerPC/ppc64-encoding-4xx.s | 33 ++++++++++++++++++++++ 4 files changed, 87 insertions(+) diff --git a/llvm/lib/Target/PowerPC/PPCInstrFormats.td b/llvm/lib/Target/PowerPC/PPCInstrFormats.td index 8a5a60b..2da4257 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrFormats.td +++ b/llvm/lib/Target/PowerPC/PPCInstrFormats.td @@ -422,6 +422,22 @@ class XForm_rs opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, let B = 0; } +class XForm_tlbws opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, + InstrItinClass itin, list pattern> + : I { + bits<5> RST; + bits<5> A; + bits<1> WS; + + let Pattern = pattern; + + let Inst{6-10} = RST; + let Inst{11-15} = A; + let Inst{20} = WS; + let Inst{21-30} = xo; + let Inst{31} = 0; +} + class XForm_6 opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, InstrItinClass itin, list pattern> : XForm_base_r3xo_swapped { diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td index 22c30b0..70b61a5 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -3121,6 +3121,20 @@ def TLBRE : XForm_24_eieio<31, 946, (outs), (ins), def TLBWE : XForm_24_eieio<31, 978, (outs), (ins), "tlbwe", IIC_LdStLoad, []>, Requires<[IsBookE]>; +def TLBRE2 : XForm_tlbws<31, 946, (outs gprc:$RS), (ins gprc:$A, i1imm:$WS), + "tlbre $RS, $A, $WS", IIC_LdStLoad, []>, Requires<[IsPPC4xx]>; + +def TLBWE2 : XForm_tlbws<31, 978, (outs), (ins gprc:$RS, gprc:$A, i1imm:$WS), + "tlbwe $RS, $A, $WS", IIC_LdStLoad, []>, Requires<[IsPPC4xx]>; + +def TLBSX2 : XForm_base_r3xo<31, 914, (outs), (ins gprc:$RST, gprc:$A, gprc:$B), + "tlbsx $RST, $A, $B", IIC_LdStLoad, []>, + Requires<[IsPPC4xx]>; +def TLBSX2D : XForm_base_r3xo<31, 914, (outs), + (ins gprc:$RST, gprc:$A, gprc:$B), + "tlbsx. $RST, $A, $B", IIC_LdStLoad, []>, + Requires<[IsPPC4xx]>, isDOT; + def RFI : XForm_0<19, 50, (outs), (ins), "rfi", IIC_BrB, []>, Requires<[IsBookE]>; def RFCI : XForm_0<19, 51, (outs), (ins), "rfci", IIC_BrB, []>, @@ -3301,6 +3315,15 @@ def : InstAlias<"mtsrr1 $RT", (MTSPR 27, gprc:$RT)>; def : InstAlias<"tlbie $RB", (TLBIE R0, gprc:$RB)>; +def : InstAlias<"tlbrehi $RS, $A", (TLBRE2 gprc:$RS, gprc:$A, 0)>, + Requires<[IsPPC4xx]>; +def : InstAlias<"tlbrelo $RS, $A", (TLBRE2 gprc:$RS, gprc:$A, 1)>, + Requires<[IsPPC4xx]>; +def : InstAlias<"tlbwehi $RS, $A", (TLBWE2 gprc:$RS, gprc:$A, 0)>, + Requires<[IsPPC4xx]>; +def : InstAlias<"tlbwelo $RS, $A", (TLBWE2 gprc:$RS, gprc:$A, 1)>, + Requires<[IsPPC4xx]>; + def EXTLWI : PPCAsmPseudo<"extlwi $rA, $rS, $n, $b", (ins gprc:$rA, gprc:$rS, u5imm:$n, u5imm:$b)>; def EXTLWIo : PPCAsmPseudo<"extlwi. $rA, $rS, $n, $b", diff --git a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt index 9eca272..0c15d03 100644 --- a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt +++ b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt @@ -4,3 +4,18 @@ 0x7c 0x72 0x2a 0x86 # CHECK: mtdcr 178, 3 0x7c 0x72 0x2b 0x86 + +# CHECK: tlbre 2, 3, 0 +0x7c 0x43 0x07 0x64 +# CHECK: tlbre 2, 3, 1 +0x7c 0x43 0x0f 0x64 + +# CHECK: tlbwe 2, 3, 0 +0x7c 0x43 0x07 0xa4 +# CHECK: tlbwe 2, 3, 1 +0x7c 0x43 0x0f 0xa4 + +# CHECK: tlbsx 2, 3, 1 +0x7c 0x43 0x0f 0x24 +# CHECK: tlbsx. 2, 3, 1 +0x7c 0x43 0x0f 0x25 diff --git a/llvm/test/MC/PowerPC/ppc64-encoding-4xx.s b/llvm/test/MC/PowerPC/ppc64-encoding-4xx.s index c53a251..3eb60e0 100644 --- a/llvm/test/MC/PowerPC/ppc64-encoding-4xx.s +++ b/llvm/test/MC/PowerPC/ppc64-encoding-4xx.s @@ -9,3 +9,36 @@ # CHECK-BE: mtdcr 178, 3 # encoding: [0x7c,0x72,0x2b,0x86] # CHECK-LE: mtdcr 178, 3 # encoding: [0x86,0x2b,0x72,0x7c] mtdcr 178,3 + +# CHECK-BE: tlbre 2, 3, 0 # encoding: [0x7c,0x43,0x07,0x64] +# CHECK-LE: tlbre 2, 3, 0 # encoding: [0x64,0x07,0x43,0x7c] + tlbre %r2, %r3, 0 +# CHECK-BE: tlbre 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0x64] +# CHECK-LE: tlbre 2, 3, 1 # encoding: [0x64,0x0f,0x43,0x7c] + tlbre %r2, %r3, 1 +# CHECK-BE: tlbre 2, 3, 0 # encoding: [0x7c,0x43,0x07,0x64] +# CHECK-LE: tlbre 2, 3, 0 # encoding: [0x64,0x07,0x43,0x7c] + tlbrehi %r2, %r3 +# CHECK-BE: tlbre 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0x64] +# CHECK-LE: tlbre 2, 3, 1 # encoding: [0x64,0x0f,0x43,0x7c] + tlbrelo %r2, %r3 + +# CHECK-BE: tlbwe 2, 3, 0 # encoding: [0x7c,0x43,0x07,0xa4] +# CHECK-LE: tlbwe 2, 3, 0 # encoding: [0xa4,0x07,0x43,0x7c] + tlbwe %r2, %r3, 0 +# CHECK-BE: tlbwe 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0xa4] +# CHECK-LE: tlbwe 2, 3, 1 # encoding: [0xa4,0x0f,0x43,0x7c] + tlbwe %r2, %r3, 1 +# CHECK-BE: tlbwe 2, 3, 0 # encoding: [0x7c,0x43,0x07,0xa4] +# CHECK-LE: tlbwe 2, 3, 0 # encoding: [0xa4,0x07,0x43,0x7c] + tlbwehi %r2, %r3 +# CHECK-BE: tlbwe 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0xa4] +# CHECK-LE: tlbwe 2, 3, 1 # encoding: [0xa4,0x0f,0x43,0x7c] + tlbwelo %r2, %r3 + +# CHECK-BE: tlbsx 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0x24] +# CHECK-LE: tlbsx 2, 3, 1 # encoding: [0x24,0x0f,0x43,0x7c] + tlbsx %r2, %r3, %r1 +# CHECK-BE: tlbsx. 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0x25] +# CHECK-LE: tlbsx. 2, 3, 1 # encoding: [0x25,0x0f,0x43,0x7c] + tlbsx. %r2, %r3, %r1 -- 2.7.4