From 6b577e26f0c41331fea19ea3e7e5f34524f1b663 Mon Sep 17 00:00:00 2001 From: Ulrich Weigand Date: Tue, 13 Jan 2015 19:43:45 +0000 Subject: [PATCH] Use the integrated assembler as default on PowerPC This was already done in clang, this commit now uses the integrated assembler as default when using LLVM tools directly. A number of test cases using inline asm had to be adapted, either by updating the expected output, or by using -no-integrated-as (for such tests that deliberately use an invalid instruction in inline asm). llvm-svn: 225819 --- llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp | 3 +-- llvm/test/CodeGen/PowerPC/asm-constraints.ll | 9 +++++---- llvm/test/CodeGen/PowerPC/crsave.ll | 4 ++-- llvm/test/CodeGen/PowerPC/ia-neg-const.ll | 4 ++-- llvm/test/CodeGen/PowerPC/in-asm-f64-reg.ll | 2 +- llvm/test/CodeGen/PowerPC/mult-alt-generic-powerpc.ll | 2 +- llvm/test/CodeGen/PowerPC/mult-alt-generic-powerpc64.ll | 2 +- 7 files changed, 13 insertions(+), 13 deletions(-) diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp index 1be7b48..2b4f2d8 100644 --- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp +++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp @@ -74,7 +74,6 @@ PPCELFMCAsmInfo::PPCELFMCAsmInfo(bool is64Bit, const Triple& T) { AssemblerDialect = 1; // New-Style mnemonics. LCOMMDirectiveAlignmentType = LCOMM::ByteAlignment; - if (T.isOSFreeBSD() || ((T.isOSNetBSD() || T.isOSOpenBSD()) && !is64Bit)) - UseIntegratedAssembler = true; + UseIntegratedAssembler = true; } diff --git a/llvm/test/CodeGen/PowerPC/asm-constraints.ll b/llvm/test/CodeGen/PowerPC/asm-constraints.ll index f354a8a..9bf8b75 100644 --- a/llvm/test/CodeGen/PowerPC/asm-constraints.ll +++ b/llvm/test/CodeGen/PowerPC/asm-constraints.ll @@ -30,10 +30,11 @@ entry: } ; CHECK-LABEL: @foo -; CHECK: ld [[REG:[0-9]+]],0(4) -; CHECK-NEXT: cmpw [[REG]],[[REG]] -; CHECK-NEXT: bne- 1f -; CHECK-NEXT: 1: isync +; CHECK: ld [[REG:[0-9]+]], 0(4) +; CHECK: cmpw 0, [[REG]], [[REG]] +; CHECK: bne- 0, .Ltmp[[TMP:[0-9]+]] +; CHECK: .Ltmp[[TMP]]: +; CHECK: isync attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { nounwind } diff --git a/llvm/test/CodeGen/PowerPC/crsave.ll b/llvm/test/CodeGen/PowerPC/crsave.ll index a9b4b360..602ba94 100644 --- a/llvm/test/CodeGen/PowerPC/crsave.ll +++ b/llvm/test/CodeGen/PowerPC/crsave.ll @@ -6,7 +6,7 @@ declare void @foo() define i32 @test_cr2() nounwind uwtable { entry: %ret = alloca i32, align 4 - %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmp 2,$2,$1\0A\09mfcr $0", "=r,r,r,r,r,~{cr2}"(i32 1, i32 2, i32 3, i32 0) nounwind + %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmpw 2,$2,$1\0A\09mfcr $0", "=r,r,r,r,r,~{cr2}"(i32 1, i32 2, i32 3, i32 0) nounwind store i32 %0, i32* %ret, align 4 call void @foo() %1 = load i32* %ret, align 4 @@ -35,7 +35,7 @@ entry: define i32 @test_cr234() nounwind { entry: %ret = alloca i32, align 4 - %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmp 2,$2,$1\0A\09cmp 3,$2,$2\0A\09cmp 4,$2,$3\0A\09mfcr $0", "=r,r,r,r,r,~{cr2},~{cr3},~{cr4}"(i32 1, i32 2, i32 3, i32 0) nounwind + %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmpw 2,$2,$1\0A\09cmpw 3,$2,$2\0A\09cmpw 4,$2,$3\0A\09mfcr $0", "=r,r,r,r,r,~{cr2},~{cr3},~{cr4}"(i32 1, i32 2, i32 3, i32 0) nounwind store i32 %0, i32* %ret, align 4 call void @foo() %1 = load i32* %ret, align 4 diff --git a/llvm/test/CodeGen/PowerPC/ia-neg-const.ll b/llvm/test/CodeGen/PowerPC/ia-neg-const.ll index 165fc13..556ab80 100644 --- a/llvm/test/CodeGen/PowerPC/ia-neg-const.ll +++ b/llvm/test/CodeGen/PowerPC/ia-neg-const.ll @@ -14,8 +14,8 @@ entry: } ; CHECK: ld -; CHECK-NOT: addi 3,3,4294967295 -; CHECK: addi 3,3,-1 +; CHECK-NOT: addi 3, 3, 4294967295 +; CHECK: addi 3, 3, -1 ; CHECK: blr ; Function Attrs: nounwind diff --git a/llvm/test/CodeGen/PowerPC/in-asm-f64-reg.ll b/llvm/test/CodeGen/PowerPC/in-asm-f64-reg.ll index 1321dfc..08b1a2c 100644 --- a/llvm/test/CodeGen/PowerPC/in-asm-f64-reg.ll +++ b/llvm/test/CodeGen/PowerPC/in-asm-f64-reg.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -no-integrated-as | FileCheck %s define void @f() { ; CHECK: @f diff --git a/llvm/test/CodeGen/PowerPC/mult-alt-generic-powerpc.ll b/llvm/test/CodeGen/PowerPC/mult-alt-generic-powerpc.ll index 659cdf7..743cc62 100644 --- a/llvm/test/CodeGen/PowerPC/mult-alt-generic-powerpc.ll +++ b/llvm/test/CodeGen/PowerPC/mult-alt-generic-powerpc.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=ppc32 +; RUN: llc < %s -march=ppc32 -no-integrated-as ; ModuleID = 'mult-alt-generic.c' target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32" target triple = "powerpc" diff --git a/llvm/test/CodeGen/PowerPC/mult-alt-generic-powerpc64.ll b/llvm/test/CodeGen/PowerPC/mult-alt-generic-powerpc64.ll index 3da06f6..29a5786 100644 --- a/llvm/test/CodeGen/PowerPC/mult-alt-generic-powerpc64.ll +++ b/llvm/test/CodeGen/PowerPC/mult-alt-generic-powerpc64.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=ppc64 +; RUN: llc < %s -march=ppc64 -no-integrated-as ; ModuleID = 'mult-alt-generic.c' target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" target triple = "powerpc64" -- 2.7.4