From 6b121f719176b4d8580e515db98c2f0a853a2294 Mon Sep 17 00:00:00 2001 From: Leonard Mai Date: Wed, 30 Nov 2011 12:20:19 -0800 Subject: [PATCH] i2c: add cloverview support BZ: 16711 Cloverview SOC use different PCI Device IDs for I2C controllers hence existing Medfield I2C driver won't be loaded on Cloverview SOC. This patch adds I2C probing support for Cloverview SOC Change-Id: I5f26899c141e09ddf420db160b678882234e6dfa Signed-off-by: Leonard D Mai Reviewed-by: Pierre Tardy Reviewed-by: Mark Gross Reviewed-by: Fei Yang Reviewed-by: Bin Yang Tested-by: Siva Prasath Ponnusamy Reviewed-on: http://android.intel.com:8080/26622 Reviewed-by: Yang, Bin Reviewed-by: Yang, Fei Reviewed-by: Seibel, Eric Reviewed-by: Du, Alek Reviewed-by: Ponnusamy, Siva Prasath Tested-by: Wang, Zhifeng Reviewed-by: buildbot Tested-by: buildbot --- drivers/i2c/busses/i2c-designware-pcidrv.c | 57 ++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c index 142be53..9de1b60 100644 --- a/drivers/i2c/busses/i2c-designware-pcidrv.c +++ b/drivers/i2c/busses/i2c-designware-pcidrv.c @@ -55,6 +55,13 @@ enum dw_pci_ctl_id_t { medfield_3, medfield_4, medfield_5, + + cloverview_0, + cloverview_1, + cloverview_2, + cloverview_3, + cloverview_4, + cloverview_5, }; struct dw_pci_controller { @@ -133,6 +140,49 @@ static struct dw_pci_controller dw_pci_controllers[] = { .rx_fifo_depth = 32, .clk_khz = 17000, }, + + [cloverview_0] = { + .bus_num = 0, + .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 17000, + }, + [cloverview_1] = { + .bus_num = 1, + .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 17000, + }, + [cloverview_2] = { + .bus_num = 2, + .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 17000, + }, + [cloverview_3] = { + .bus_num = 3, + .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_STD, + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 17000, + }, + [cloverview_4] = { + .bus_num = 4, + .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 17000, + }, + [cloverview_5] = { + .bus_num = 5, + .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 17000, + }, }; static struct i2c_algorithm i2c_dw_algo = { .master_xfer = i2c_dw_xfer, @@ -377,6 +427,13 @@ DEFINE_PCI_DEVICE_TABLE(i2_designware_pci_ids) = { { PCI_VDEVICE(INTEL, 0x082C), medfield_0 }, { PCI_VDEVICE(INTEL, 0x082D), medfield_1 }, { PCI_VDEVICE(INTEL, 0x082E), medfield_2 }, + /* Cloverview */ + { PCI_VDEVICE(INTEL, 0x08E2), cloverview_0 }, + { PCI_VDEVICE(INTEL, 0x08E3), cloverview_1 }, + { PCI_VDEVICE(INTEL, 0x08E4), cloverview_2 }, + { PCI_VDEVICE(INTEL, 0x08F4), cloverview_3,}, + { PCI_VDEVICE(INTEL, 0x08F5), cloverview_4 }, + { PCI_VDEVICE(INTEL, 0x08F6), cloverview_5 }, { 0,} }; MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids); -- 2.7.4