From 6b067c6a91e5a4630c6ff5747c58c27ef4671242 Mon Sep 17 00:00:00 2001 From: David Green Date: Thu, 2 Jan 2020 11:43:37 +0000 Subject: [PATCH] [ARM] Update ifcvt test target triples and opcodes. NFC Some of the instructions in these tests were technically invalid combinations (using ARM opcodes in Thumb mode, for example). Update the targets and the instructions used to be more correct. --- .../ARM/PR32721_ifcvt_triangle_unanalyzable.mir | 2 +- llvm/test/CodeGen/ARM/ifcvt_canFallThroughTo.mir | 2 +- .../CodeGen/ARM/ifcvt_diamond_unanalyzable.mir | 12 ++++++------ .../ARM/ifcvt_forked_diamond_unanalyzable.mir | 22 +++++++++++----------- .../ARM/ifcvt_simple_bad_zero_prob_succ.mir | 8 ++++---- .../test/CodeGen/ARM/ifcvt_simple_unanalyzable.mir | 12 ++++++------ .../test/CodeGen/ARM/ifcvt_triangleSameCvtNext.mir | 14 +++++++------- .../CodeGen/ARM/ifcvt_triangleWoCvtToNextEdge.mir | 10 +++++----- 8 files changed, 41 insertions(+), 41 deletions(-) diff --git a/llvm/test/CodeGen/ARM/PR32721_ifcvt_triangle_unanalyzable.mir b/llvm/test/CodeGen/ARM/PR32721_ifcvt_triangle_unanalyzable.mir index 30306fe..1a9576d 100644 --- a/llvm/test/CodeGen/ARM/PR32721_ifcvt_triangle_unanalyzable.mir +++ b/llvm/test/CodeGen/ARM/PR32721_ifcvt_triangle_unanalyzable.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple=arm-apple-ios -run-pass=if-converter %s -o - | FileCheck %s +# RUN: llc -mtriple=armv7-apple-ios -run-pass=if-converter %s -o - | FileCheck %s --- name: foo body: | diff --git a/llvm/test/CodeGen/ARM/ifcvt_canFallThroughTo.mir b/llvm/test/CodeGen/ARM/ifcvt_canFallThroughTo.mir index 99e82e7..00d0d43 100644 --- a/llvm/test/CodeGen/ARM/ifcvt_canFallThroughTo.mir +++ b/llvm/test/CodeGen/ARM/ifcvt_canFallThroughTo.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple=arm-apple-ios -o - %s -run-pass if-converter | FileCheck %s +# RUN: llc -mtriple=armv7-apple-ios -o - %s -run-pass if-converter | FileCheck %s --- name: f1 body: | diff --git a/llvm/test/CodeGen/ARM/ifcvt_diamond_unanalyzable.mir b/llvm/test/CodeGen/ARM/ifcvt_diamond_unanalyzable.mir index 3061eb3..9a939e2 100644 --- a/llvm/test/CodeGen/ARM/ifcvt_diamond_unanalyzable.mir +++ b/llvm/test/CodeGen/ARM/ifcvt_diamond_unanalyzable.mir @@ -1,22 +1,22 @@ -# RUN: llc -mtriple=arm-apple-ios -run-pass=if-converter %s -o - | FileCheck %s +# RUN: llc -mtriple=thumbv7-apple-ios -run-pass=if-converter %s -o - | FileCheck %s --- name: foo body: | bb.0: - Bcc %bb.2, 1, $cpsr + tBcc %bb.2, 1, $cpsr bb.1: $sp = tADDspi $sp, 1, 14, _ - B %bb.3 + tB %bb.3, 14, $noreg bb.2: $sp = tADDspi $sp, 2, 14, _ - B %bb.3 + tB %bb.3, 14, $noreg bb.3: successors: $sp = tADDspi $sp, 3, 14, _ - BX_RET 14, _ + tBX_RET 14, _ ... # Diamond testcase with unanalyzable instruction in the BB following the @@ -27,4 +27,4 @@ body: | # CHECK: $sp = tADDspi $sp, 2, 1, $cpsr # CHECK: $sp = tADDspi $sp, 1, 0, $cpsr, implicit $sp # CHECK: $sp = tADDspi $sp, 3, 14, $noreg -# CHECK: BX_RET 14, $noreg +# CHECK: tBX_RET 14, $noreg diff --git a/llvm/test/CodeGen/ARM/ifcvt_forked_diamond_unanalyzable.mir b/llvm/test/CodeGen/ARM/ifcvt_forked_diamond_unanalyzable.mir index 60dcbd9..fc81273 100644 --- a/llvm/test/CodeGen/ARM/ifcvt_forked_diamond_unanalyzable.mir +++ b/llvm/test/CodeGen/ARM/ifcvt_forked_diamond_unanalyzable.mir @@ -1,31 +1,31 @@ -# RUN: llc -mtriple=arm-apple-ios -run-pass=if-converter %s -o - | FileCheck %s +# RUN: llc -mtriple=thumbv7-apple-ios -run-pass=if-converter %s -o - | FileCheck %s --- name: foo body: | bb.0: - Bcc %bb.2, 1, $cpsr + tBcc %bb.2, 1, $cpsr bb.1: successors: %bb.3(0x20000000), %bb.4(0x60000000) $sp = tADDspi $sp, 1, 14, _ - Bcc %bb.3, 1, $cpsr - B %bb.4 + tBcc %bb.3, 1, $cpsr + tB %bb.4, 14, $noreg bb.2: successors: %bb.3(0x20000000), %bb.4(0x60000000) $sp = tADDspi $sp, 2, 14, _ - Bcc %bb.3, 1, $cpsr - B %bb.4 + tBcc %bb.3, 1, $cpsr + tB %bb.4, 14, $noreg bb.3: successors: $sp = tADDspi $sp, 3, 14, _ - BX_RET 14, _ + tBX_RET 14, _ bb.4: successors: $sp = tADDspi $sp, 4, 14, _ - BX_RET 14, _ + tBX_RET 14, _ ... # Forked-diamond testcase with unanalyzable instructions in both the True and @@ -37,12 +37,12 @@ body: | # CHECK: $sp = tADDspi $sp, 2, 1, $cpsr # CHECK: $sp = tADDspi $sp, 1, 0, $cpsr, implicit $sp -# CHECK: Bcc %bb.2, 1, $cpsr +# CHECK: t2Bcc %bb.2, 1, $cpsr # CHECK: bb.1: # CHECK: $sp = tADDspi $sp, 4, 14, $noreg -# CHECK: BX_RET 14, $noreg +# CHECK: tBX_RET 14, $noreg # CHECK: bb.2: # CHECK: $sp = tADDspi $sp, 3, 14, $noreg -# CHECK: BX_RET 14, $noreg +# CHECK: tBX_RET 14, $noreg diff --git a/llvm/test/CodeGen/ARM/ifcvt_simple_bad_zero_prob_succ.mir b/llvm/test/CodeGen/ARM/ifcvt_simple_bad_zero_prob_succ.mir index 92738e1..87d351d 100644 --- a/llvm/test/CodeGen/ARM/ifcvt_simple_bad_zero_prob_succ.mir +++ b/llvm/test/CodeGen/ARM/ifcvt_simple_bad_zero_prob_succ.mir @@ -1,16 +1,16 @@ -# RUN: llc -mtriple=arm-apple-ios -run-pass=if-converter %s -o - | FileCheck %s +# RUN: llc -mtriple=thumbv7-apple-ios -run-pass=if-converter %s -o - | FileCheck %s --- name: f1 body: | bb.0: bb.1: - Bcc %bb.3, 0, $cpsr + tBcc %bb.3, 0, $cpsr bb.2: bb.3: - Bcc %bb.1, 0, $cpsr + tBcc %bb.1, 0, $cpsr bb.4: successors: %bb.1 @@ -28,6 +28,6 @@ body: | # CHECK: successors: %bb.1(0x80000000) # CHECK-NOT: %bb.2(0x00000000) # CHECK: tBRIND $r1, 1, $cpsr -# CHECK: B %bb.1 +# CHECK: t2B %bb.1 #CHECK-NOT: bb.2: diff --git a/llvm/test/CodeGen/ARM/ifcvt_simple_unanalyzable.mir b/llvm/test/CodeGen/ARM/ifcvt_simple_unanalyzable.mir index 1856853..a016154 100644 --- a/llvm/test/CodeGen/ARM/ifcvt_simple_unanalyzable.mir +++ b/llvm/test/CodeGen/ARM/ifcvt_simple_unanalyzable.mir @@ -1,18 +1,18 @@ -# RUN: llc -mtriple=arm-apple-ios -run-pass=if-converter %s -o - | FileCheck %s +# RUN: llc -mtriple=thumbv7-apple-ios -run-pass=if-converter %s -o - | FileCheck %s --- name: foo body: | bb.0: - Bcc %bb.2, 0, $cpsr + tBcc %bb.2, 0, $cpsr bb.1: successors: - BX_RET 14, _ + tBX_RET 14, _ bb.2: successors: $sp = tADDspi $sp, 2, 14, _ - BX_RET 14, _ + tBX_RET 14, _ ... # Simple testcase with unanalyzable instructions in both TBB and FBB. @@ -20,6 +20,6 @@ body: | # CHECK: body: | # CHECK: bb.0: # CHECK: $sp = tADDspi $sp, 2, 0, $cpsr -# CHECK: BX_RET 0, $cpsr -# CHECK: BX_RET 14, $noreg +# CHECK: tBX_RET 0, $cpsr +# CHECK: tBX_RET 14, $noreg diff --git a/llvm/test/CodeGen/ARM/ifcvt_triangleSameCvtNext.mir b/llvm/test/CodeGen/ARM/ifcvt_triangleSameCvtNext.mir index bef131df..d37aba2 100644 --- a/llvm/test/CodeGen/ARM/ifcvt_triangleSameCvtNext.mir +++ b/llvm/test/CodeGen/ARM/ifcvt_triangleSameCvtNext.mir @@ -1,22 +1,22 @@ -# RUN: llc -mtriple=arm-apple-ios -run-pass=if-converter -verify-machineinstrs %s -o - | FileCheck %s +# RUN: llc -mtriple=thumbv7-apple-ios -run-pass=if-converter -verify-machineinstrs %s -o - | FileCheck %s ... --- name: foo body: | bb.0: - Bcc %bb.2, 1, $cpsr + tBcc %bb.2, 1, $cpsr bb.1: $sp = tADDspi $sp, 2, 14, _ - B %bb.1 + tB %bb.1, 14, $noreg bb.2: - Bcc %bb.3, 0, $cpsr - B %bb.2 + tBcc %bb.3, 0, $cpsr + tB %bb.2, 14, $noreg bb.3: - Bcc %bb.1, 1, $cpsr - B %bb.1 + tBcc %bb.1, 1, $cpsr + tB %bb.1, 14, $noreg ... # Both branches in bb.3 jump to bb.1. IfConversion shouldn't treat this as a diff --git a/llvm/test/CodeGen/ARM/ifcvt_triangleWoCvtToNextEdge.mir b/llvm/test/CodeGen/ARM/ifcvt_triangleWoCvtToNextEdge.mir index a2a3180..8effb90 100644 --- a/llvm/test/CodeGen/ARM/ifcvt_triangleWoCvtToNextEdge.mir +++ b/llvm/test/CodeGen/ARM/ifcvt_triangleWoCvtToNextEdge.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple=arm-apple-ios -run-pass=if-converter %s -o - | FileCheck %s +# RUN: llc -mtriple=thumb-apple-ios -run-pass=if-converter %s -o - | FileCheck %s --- | declare void @__stack_chk_fail() declare void @bar() @@ -12,11 +12,11 @@ name: foo body: | bb.0: - Bcc %bb.1, 1, $cpsr - B %bb.2 + tBcc %bb.1, 1, $cpsr + tB %bb.2, 14, $noreg bb.1: - Bcc %bb.3, 0, $cpsr + tBcc %bb.3, 0, $cpsr bb.2: successors: @@ -38,7 +38,7 @@ body: | # CHECK: bb.0: # CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000) -# CHECK: Bcc %bb.2, 1, $cpsr +# CHECK: tBcc %bb.2, 1, $cpsr # CHECK: bb.1: # CHECK-NOT: successors: %bb -- 2.7.4