From 6ad4bf330bfbbc48d83c0bc3dc85a4f2386629ba Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Fri, 19 Feb 2021 18:23:21 +0000 Subject: [PATCH] [X86] Regenerate 2011-12-06-AVXVectorExtractCombine.ll --- llvm/test/CodeGen/X86/2011-12-06-AVXVectorExtractCombine.ll | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/llvm/test/CodeGen/X86/2011-12-06-AVXVectorExtractCombine.ll b/llvm/test/CodeGen/X86/2011-12-06-AVXVectorExtractCombine.ll index e6ba755..09f6d42 100644 --- a/llvm/test/CodeGen/X86/2011-12-06-AVXVectorExtractCombine.ll +++ b/llvm/test/CodeGen/X86/2011-12-06-AVXVectorExtractCombine.ll @@ -1,12 +1,14 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s ; PR11494 define void @test(<4 x i32>* nocapture %p) nounwind { - ; CHECK-LABEL: test: - ; CHECK: vpxor %xmm0, %xmm0, %xmm0 - ; CHECK-NEXT: vpmaxsd (%rdi), %xmm0, %xmm0 - ; CHECK-NEXT: vmovdqu %xmm0, (%rdi) - ; CHECK-NEXT: ret +; CHECK-LABEL: test: +; CHECK: ## %bb.0: +; CHECK-NEXT: vpxor %xmm0, %xmm0, %xmm0 +; CHECK-NEXT: vpmaxsd (%rdi), %xmm0, %xmm0 +; CHECK-NEXT: vmovdqu %xmm0, (%rdi) +; CHECK-NEXT: retq %a = load <4 x i32>, <4 x i32>* %p, align 1 %b = call <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32> %a, <4 x i32> zeroinitializer) nounwind %c = shufflevector <4 x i32> %b, <4 x i32> undef, <8 x i32> -- 2.7.4