From 6a9d390b6b814d97a69c5d6276c149966cd9f08c Mon Sep 17 00:00:00 2001 From: Christian Konig Date: Tue, 26 Mar 2013 14:03:44 +0000 Subject: [PATCH] R600/SI: fix ELSE pseudo op handling MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Restore the EXEC mask early, otherwise a copy might end up not beeing executed. Candidate for the mesa stable branch. Signed-off-by: Christian König Reviewed-by: Michel Dänzer Tested-by: Michel Dänzer llvm-svn: 178018 --- llvm/lib/Target/R600/SILowerControlFlow.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/llvm/lib/Target/R600/SILowerControlFlow.cpp b/llvm/lib/Target/R600/SILowerControlFlow.cpp index 9a027e7..6b3f626 100644 --- a/llvm/lib/Target/R600/SILowerControlFlow.cpp +++ b/llvm/lib/Target/R600/SILowerControlFlow.cpp @@ -197,7 +197,8 @@ void SILowerControlFlowPass::Else(MachineInstr &MI) { unsigned Dst = MI.getOperand(0).getReg(); unsigned Src = MI.getOperand(1).getReg(); - BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_OR_SAVEEXEC_B64), Dst) + BuildMI(MBB, MBB.getFirstNonPHI(), DL, + TII->get(AMDGPU::S_OR_SAVEEXEC_B64), Dst) .addReg(Src); // Saved EXEC BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_XOR_B64), AMDGPU::EXEC) -- 2.7.4