From 6a5d7c7d77b50c7749e84c378e46b20f5cde9974 Mon Sep 17 00:00:00 2001 From: David Schleef Date: Tue, 3 Aug 2010 00:44:47 -0700 Subject: [PATCH] test: Add disabled code for Cortex-A8 benchmarking --- orc-test/orcprofile.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/orc-test/orcprofile.c b/orc-test/orcprofile.c index 48e0c3e..559b174 100644 --- a/orc-test/orcprofile.c +++ b/orc-test/orcprofile.c @@ -39,6 +39,9 @@ #include #include +/* not used because it requires a kernel patch */ +#undef USE_CORTEX_A8_COUNTER + /** * SECTION:orcprofile * @title:OrcProfile @@ -56,6 +59,18 @@ void orc_profile_init (OrcProfile *prof) { +#if defined(__GNUC__) && defined(HAVE_ARM) && defined(USE_CORTEX_A8_COUNTER) + unsigned int flags; + + __asm__ volatile ("mrc p15, 0, %0, c9, c12, 0" : "=r" (flags)); + flags |= 1; + __asm__ volatile ("mcr p15, 0, %0, c9, c12, 0" :: "r" (flags)); + + __asm__ volatile ("mcr p15, 0, %0, c9, c12, 2" :: "r"(1<<31)); + __asm__ __volatile__(" mcr p15, 0, %0, c9, c13, 0" :: "r" (0)); + + __asm__ volatile ("mcr p15, 0, %0, c9, c12, 1" :: "r"(1<<31)); +#endif memset(prof, 0, sizeof(OrcProfile)); prof->min = -1; @@ -156,6 +171,11 @@ oil_profile_stamp_default (void) unsigned long ts; __asm__ __volatile__("rdtsc\n" : "=a" (ts) : : "edx"); return ts; +#elif defined(__GNUC__) && defined(HAVE_ARM) && defined(USE_CORTEX_A8_COUNTER) + unsigned int ts; + //__asm__ __volatile__(" mrc p14, 0, %0, c1, c0, 0 \n" : "=r" (ts)); + __asm__ __volatile__(" mrc p15, 0, %0, c9, c13, 0 \n" : "=r" (ts)); + return ts; #elif defined(_MSC_VER) && defined(HAVE_I386) unsigned long ts; __asm push edx -- 2.7.4