From 6a281d396d5026b04063372016517ba1cb34e3b2 Mon Sep 17 00:00:00 2001 From: Sergei Barannikov/AI Tools Lab /SRR/Engineer/Samsung Electronics Date: Mon, 2 Dec 2019 16:17:13 +0300 Subject: [PATCH] [neurun] Add `access` method to tensors (#9334) Add virtual method `access` to `ITensor` and derived classes. Signed-off-by: Sergei Barannikov --- runtime/neurun/backend/acl_cl/operand/ICLTensor.cc | 45 ++++++++++++++++++++++ runtime/neurun/backend/acl_cl/operand/ICLTensor.h | 1 + .../neurun/backend/acl_neon/operand/INETensor.cc | 33 ++++++++++++++++ .../neurun/backend/acl_neon/operand/INETensor.h | 1 + runtime/neurun/backend/cpu/operand/Tensor.cc | 2 + runtime/neurun/backend/cpu/operand/Tensor.h | 1 + runtime/neurun/backend/srcn/operand/Tensor.cc | 2 + runtime/neurun/backend/srcn/operand/Tensor.h | 1 + .../neurun/core/include/backend/operand/ITensor.h | 2 + runtime/neurun/core/src/exec/interp/Tensor.cc | 5 +++ runtime/neurun/core/src/exec/interp/Tensor.h | 1 + 11 files changed, 94 insertions(+) create mode 100644 runtime/neurun/backend/acl_cl/operand/ICLTensor.cc create mode 100644 runtime/neurun/backend/acl_neon/operand/INETensor.cc diff --git a/runtime/neurun/backend/acl_cl/operand/ICLTensor.cc b/runtime/neurun/backend/acl_cl/operand/ICLTensor.cc new file mode 100644 index 0000000..6b14584 --- /dev/null +++ b/runtime/neurun/backend/acl_cl/operand/ICLTensor.cc @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "ICLTensor.h" + +#include + +namespace neurun +{ +namespace backend +{ +namespace acl_cl +{ +namespace operand +{ + +void ICLTensor::access(const std::function &fn) +{ + auto &queue = ::arm_compute::CLScheduler::get().queue(); + + // This is an optional input + if (total_size() == 0) + return; + + map(queue); + fn(*this); + unmap(queue); +} +} // namespace operand +} // namespace acl_cl +} // namespace backend +} // namespace neurun diff --git a/runtime/neurun/backend/acl_cl/operand/ICLTensor.h b/runtime/neurun/backend/acl_cl/operand/ICLTensor.h index 022cec6..68e4e7f 100644 --- a/runtime/neurun/backend/acl_cl/operand/ICLTensor.h +++ b/runtime/neurun/backend/acl_cl/operand/ICLTensor.h @@ -39,6 +39,7 @@ public: public: void map(cl::CommandQueue &q, bool blocking = true) { return handle()->map(q, blocking); } void unmap(cl::CommandQueue &q) { return handle()->unmap(q); } + void access(const std::function &fn) final; }; } // namespace operand diff --git a/runtime/neurun/backend/acl_neon/operand/INETensor.cc b/runtime/neurun/backend/acl_neon/operand/INETensor.cc new file mode 100644 index 0000000..fdb2097 --- /dev/null +++ b/runtime/neurun/backend/acl_neon/operand/INETensor.cc @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "INETensor.h" + +namespace neurun +{ +namespace backend +{ +namespace acl_neon +{ +namespace operand +{ + +void INETensor::access(const std::function &fn) { fn(*this); } + +} // namespace operand +} // namespace acl_neon +} // namespace backend +} // namespace neurun diff --git a/runtime/neurun/backend/acl_neon/operand/INETensor.h b/runtime/neurun/backend/acl_neon/operand/INETensor.h index 256806a..22b1140 100644 --- a/runtime/neurun/backend/acl_neon/operand/INETensor.h +++ b/runtime/neurun/backend/acl_neon/operand/INETensor.h @@ -35,6 +35,7 @@ class INETensor : public acl_common::IACLTensor public: const arm_compute::ITensor *handle() const override = 0; arm_compute::ITensor *handle() override = 0; + void access(const std::function &fn) final; }; } // namespace operand diff --git a/runtime/neurun/backend/cpu/operand/Tensor.cc b/runtime/neurun/backend/cpu/operand/Tensor.cc index 29e6eb8..21d4a9d 100644 --- a/runtime/neurun/backend/cpu/operand/Tensor.cc +++ b/runtime/neurun/backend/cpu/operand/Tensor.cc @@ -37,6 +37,8 @@ size_t Tensor::calcOffset(const neurun::util::Coordinates &coords) const return offset; } +void Tensor::access(const std::function &fn) { fn(*this); } + } // namespace operand } // namespace cpu } // namespace backend diff --git a/runtime/neurun/backend/cpu/operand/Tensor.h b/runtime/neurun/backend/cpu/operand/Tensor.h index d0bfbf3..69f7237 100644 --- a/runtime/neurun/backend/cpu/operand/Tensor.h +++ b/runtime/neurun/backend/cpu/operand/Tensor.h @@ -62,6 +62,7 @@ public: size_t calcOffset(const neurun::util::Coordinates &coords) const override; model::Layout layout() const override { return model::Layout::NHWC; } bool has_padding() const override { return false; } + void access(const std::function &fn) final; private: model::OperandInfo _info; diff --git a/runtime/neurun/backend/srcn/operand/Tensor.cc b/runtime/neurun/backend/srcn/operand/Tensor.cc index ef5f675..8a53f97 100644 --- a/runtime/neurun/backend/srcn/operand/Tensor.cc +++ b/runtime/neurun/backend/srcn/operand/Tensor.cc @@ -37,6 +37,8 @@ size_t Tensor::calcOffset(const neurun::util::Coordinates &coords) const return offset; } +void Tensor::access(const std::function &fn) { fn(*this); } + } // namespace operand } // namespace srcn } // namespace backend diff --git a/runtime/neurun/backend/srcn/operand/Tensor.h b/runtime/neurun/backend/srcn/operand/Tensor.h index 3ef3ac3..dd58a29 100644 --- a/runtime/neurun/backend/srcn/operand/Tensor.h +++ b/runtime/neurun/backend/srcn/operand/Tensor.h @@ -63,6 +63,7 @@ public: size_t calcOffset(const neurun::util::Coordinates &coords) const override; model::Layout layout() const override { return _layout; } bool has_padding() const override { return false; } + void access(const std::function &fn) final; private: model::OperandInfo _info; diff --git a/runtime/neurun/core/include/backend/operand/ITensor.h b/runtime/neurun/core/include/backend/operand/ITensor.h index f762ad0..f7a79cf 100644 --- a/runtime/neurun/core/include/backend/operand/ITensor.h +++ b/runtime/neurun/core/include/backend/operand/ITensor.h @@ -19,6 +19,7 @@ #include #include +#include #include "model/Layout.h" #include "util/Coordinates.h" @@ -43,6 +44,7 @@ public: virtual size_t calcOffset(const neurun::util::Coordinates &coords) const = 0; virtual model::Layout layout() const = 0; virtual bool has_padding() const = 0; + virtual void access(const std::function &fn) = 0; }; } // namespace operand diff --git a/runtime/neurun/core/src/exec/interp/Tensor.cc b/runtime/neurun/core/src/exec/interp/Tensor.cc index becb737..af752dd 100644 --- a/runtime/neurun/core/src/exec/interp/Tensor.cc +++ b/runtime/neurun/core/src/exec/interp/Tensor.cc @@ -25,6 +25,11 @@ namespace exec namespace interp { +void ITensor::access(const std::function &fn) +{ + fn(*this); +} + size_t ROTensor::calcOffset(const neurun::util::Coordinates &coords) const { NO_USE(coords); diff --git a/runtime/neurun/core/src/exec/interp/Tensor.h b/runtime/neurun/core/src/exec/interp/Tensor.h index c8237de..a48160b 100644 --- a/runtime/neurun/core/src/exec/interp/Tensor.h +++ b/runtime/neurun/core/src/exec/interp/Tensor.h @@ -92,6 +92,7 @@ public: * @return Number of elements */ virtual uint64_t num_elements() const = 0; + void access(const std::function &fn) final; }; /** -- 2.7.4