From 6a1490bc8ffd6b0259e7d36d04ac207f39a029bb Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 6 Dec 2012 11:48:25 -0800 Subject: [PATCH] i965: Print the flag reg updated by conditional modifiers. This makes our output more consistent with other disasm tools, and will be necessary when we start using f0.1. Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_disasm.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c index b18676d..ef88edd 100644 --- a/src/mesa/drivers/dri/i965/brw_disasm.c +++ b/src/mesa/drivers/dri/i965/brw_disasm.c @@ -1069,10 +1069,24 @@ int brw_disasm (FILE *file, struct brw_instruction *inst, int gen) err |= control (file, "function", math_function, inst->header.destreg__conditionalmod, NULL); } else if (inst->header.opcode != BRW_OPCODE_SEND && - inst->header.opcode != BRW_OPCODE_SENDC) + inst->header.opcode != BRW_OPCODE_SENDC) { err |= control (file, "conditional modifier", conditional_modifier, inst->header.destreg__conditionalmod, NULL); + /* If we're using the conditional modifier, print which flags reg is + * used for it. Note that on gen6+, the embedded-condition SEL and + * control flow doesn't update flags. + */ + if (inst->header.destreg__conditionalmod && + (gen < 6 || (inst->header.opcode != BRW_OPCODE_SEL && + inst->header.opcode != BRW_OPCODE_IF && + inst->header.opcode != BRW_OPCODE_WHILE))) { + format (file, ".f%d", gen >= 7 ? inst->bits2.da1.flag_reg_nr : 0); + if (inst->bits2.da1.flag_subreg_nr) + format (file, ".%d", inst->bits2.da1.flag_subreg_nr); + } + } + if (inst->header.opcode != BRW_OPCODE_NOP) { string (file, "("); err |= control (file, "execution size", exec_size, inst->header.execution_size, NULL); -- 2.7.4