From 6941b1f6c129011bd6c9e8a4683a7fc6633bae32 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Fri, 2 Sep 2022 16:04:39 +0100 Subject: [PATCH] [CostModel][X86] Add CostKinds to SSE42 fadd/fsub/fneg ops These were missed in an earlier commit, the latency/codesize/size-latency numbers aren't different from the SSE2 values that it was falling through to, hence no test change, but it did mean we were wasting a lookup. --- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp index a1a1b65..359e710 100644 --- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp +++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp @@ -1016,15 +1016,15 @@ InstructionCost X86TTIImpl::getArithmeticInstrCost( return LT.first * KindCost.value(); static const CostKindTblEntry SSE42CostTable[] = { - { ISD::FADD, MVT::f64, { 1 } }, // Nehalem from http://www.agner.org/ - { ISD::FADD, MVT::f32, { 1 } }, // Nehalem from http://www.agner.org/ - { ISD::FADD, MVT::v2f64, { 1 } }, // Nehalem from http://www.agner.org/ - { ISD::FADD, MVT::v4f32, { 1 } }, // Nehalem from http://www.agner.org/ - - { ISD::FSUB, MVT::f64, { 1 } }, // Nehalem from http://www.agner.org/ - { ISD::FSUB, MVT::f32 , { 1 } }, // Nehalem from http://www.agner.org/ - { ISD::FSUB, MVT::v2f64, { 1 } }, // Nehalem from http://www.agner.org/ - { ISD::FSUB, MVT::v4f32, { 1 } }, // Nehalem from http://www.agner.org/ + { ISD::FADD, MVT::f64, { 1, 3, 1, 1 } }, // Nehalem from http://www.agner.org/ + { ISD::FADD, MVT::f32, { 1, 3, 1, 1 } }, // Nehalem from http://www.agner.org/ + { ISD::FADD, MVT::v2f64, { 1, 3, 1, 1 } }, // Nehalem from http://www.agner.org/ + { ISD::FADD, MVT::v4f32, { 1, 3, 1, 1 } }, // Nehalem from http://www.agner.org/ + + { ISD::FSUB, MVT::f64, { 1, 3, 1, 1 } }, // Nehalem from http://www.agner.org/ + { ISD::FSUB, MVT::f32 , { 1, 3, 1, 1 } }, // Nehalem from http://www.agner.org/ + { ISD::FSUB, MVT::v2f64, { 1, 3, 1, 1 } }, // Nehalem from http://www.agner.org/ + { ISD::FSUB, MVT::v4f32, { 1, 3, 1, 1 } }, // Nehalem from http://www.agner.org/ { ISD::FMUL, MVT::f64, { 1 } }, // Nehalem from http://www.agner.org/ { ISD::FMUL, MVT::f32, { 1 } }, // Nehalem from http://www.agner.org/ -- 2.7.4