From 68ed9d94720c50a48bc7d5d1321b37a5381a54fd Mon Sep 17 00:00:00 2001 From: =?utf8?q?Thorsten=20Sch=C3=BCtt?= Date: Fri, 23 Jun 2023 18:36:59 +0200 Subject: [PATCH] [GlobalIsel][X86] G_STORE extension Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D153643 --- llvm/lib/Target/X86/X86LegalizerInfo.cpp | 19 ++++-- .../CodeGen/X86/GlobalISel/legalize-store-avx.mir | 73 ++++++++++++++++++++++ .../CodeGen/X86/GlobalISel/legalize-store-sse.mir | 56 +++++++++++++++++ 3 files changed, 143 insertions(+), 5 deletions(-) create mode 100644 llvm/test/CodeGen/X86/GlobalISel/legalize-store-avx.mir create mode 100644 llvm/test/CodeGen/X86/GlobalISel/legalize-store-sse.mir diff --git a/llvm/lib/Target/X86/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/X86LegalizerInfo.cpp index edc3950..2d08932 100644 --- a/llvm/lib/Target/X86/X86LegalizerInfo.cpp +++ b/llvm/lib/Target/X86/X86LegalizerInfo.cpp @@ -48,16 +48,21 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI, const LLT s80 = LLT::scalar(80); const LLT s128 = LLT::scalar(128); const LLT sMaxScalar = Subtarget.is64Bit() ? s64 : s32; + const LLT v2s32 = LLT::fixed_vector(2, 32); + const LLT v4s8 = LLT::fixed_vector(4, 8); + const LLT v16s8 = LLT::fixed_vector(16, 8); const LLT v8s16 = LLT::fixed_vector(8, 16); const LLT v4s32 = LLT::fixed_vector(4, 32); const LLT v2s64 = LLT::fixed_vector(2, 64); + const LLT v2p0 = LLT::fixed_vector(2, p0); const LLT v32s8 = LLT::fixed_vector(32, 8); const LLT v16s16 = LLT::fixed_vector(16, 16); const LLT v8s32 = LLT::fixed_vector(8, 32); const LLT v4s64 = LLT::fixed_vector(4, 64); + const LLT v4p0 = LLT::fixed_vector(4, p0); const LLT v64s8 = LLT::fixed_vector(64, 8); const LLT v32s16 = LLT::fixed_vector(32, 16); @@ -330,7 +335,7 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI, getActionDefinitionsBuilder({G_FRAME_INDEX, G_GLOBAL_VALUE}).legalFor({p0}); - // load/store + // load/store: add more corner cases for (unsigned Op : {G_LOAD, G_STORE}) { auto &Action = getActionDefinitionsBuilder(Op); Action.legalForTypesWithMemDesc({{s8, p0, s1, 1}, @@ -341,22 +346,26 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI, {s32, p0, s16, 1}, {s32, p0, s32, 1}, {s80, p0, s80, 1}, - {p0, p0, p0, 1}}); + {p0, p0, p0, 1}, + {v4s8, p0, v4s8, 1}}); if (Is64Bit) Action.legalForTypesWithMemDesc({{s64, p0, s8, 1}, {s64, p0, s16, 1}, {s64, p0, s32, 1}, - {s64, p0, s64, 1}}); + {s64, p0, s64, 1}, + {v2s32, p0, v2s32, 1}}); if (HasSSE1) Action.legalForTypesWithMemDesc({{v16s8, p0, v16s8, 1}, {v8s16, p0, v8s16, 1}, {v4s32, p0, v4s32, 1}, - {v2s64, p0, v2s64, 1}}); + {v2s64, p0, v2s64, 1}, + {v2p0, p0, v2p0, 1}}); if (HasAVX) Action.legalForTypesWithMemDesc({{v32s8, p0, v32s8, 1}, {v16s16, p0, v16s16, 1}, {v8s32, p0, v8s32, 1}, - {v4s64, p0, v4s64, 1}}); + {v4s64, p0, v4s64, 1}, + {v4p0, p0, v4p0, 1}}); if (HasAVX512) Action.legalForTypesWithMemDesc({{v64s8, p0, v64s8, 1}, {v32s16, p0, v32s16, 1}, diff --git a/llvm/test/CodeGen/X86/GlobalISel/legalize-store-avx.mir b/llvm/test/CodeGen/X86/GlobalISel/legalize-store-avx.mir new file mode 100644 index 0000000..c80b561 --- /dev/null +++ b/llvm/test/CodeGen/X86/GlobalISel/legalize-store-avx.mir @@ -0,0 +1,73 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2 +# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=X86-64-AVX + +# test G_STORE with vectors + +--- +name: test_gstore_v2s32 +body: | + bb.0: + ; X86-64-AVX-LABEL: name: test_gstore_v2s32 + ; X86-64-AVX: [[DEF:%[0-9]+]]:_(<2 x s32>) = IMPLICIT_DEF + ; X86-64-AVX-NEXT: [[DEF1:%[0-9]+]]:_(p0) = IMPLICIT_DEF + ; X86-64-AVX-NEXT: G_STORE [[DEF]](<2 x s32>), [[DEF1]](p0) :: (store (<2 x s32>) into `ptr undef`) + ; X86-64-AVX-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY [[DEF1]](p0) + ; X86-64-AVX-NEXT: RET 0, implicit [[COPY]](p0) + %0:_(<2 x s32>) = IMPLICIT_DEF + %1:_(p0) = IMPLICIT_DEF + G_STORE %0:_(<2 x s32>), %1:_(p0) :: (store (<2 x s32>) into `ptr undef`) + %2:_(p0) = COPY %1:_(p0) + RET 0, implicit %2:_(p0) + +... +--- +name: test_gstore_v4s8 +body: | + bb.0: + ; X86-64-AVX-LABEL: name: test_gstore_v4s8 + ; X86-64-AVX: [[DEF:%[0-9]+]]:_(<4 x s8>) = IMPLICIT_DEF + ; X86-64-AVX-NEXT: [[DEF1:%[0-9]+]]:_(p0) = IMPLICIT_DEF + ; X86-64-AVX-NEXT: G_STORE [[DEF]](<4 x s8>), [[DEF1]](p0) :: (store (<4 x s8>) into `ptr undef`) + ; X86-64-AVX-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY [[DEF1]](p0) + ; X86-64-AVX-NEXT: RET 0, implicit [[COPY]](p0) + %0:_(<4 x s8>) = IMPLICIT_DEF + %1:_(p0) = IMPLICIT_DEF + G_STORE %0:_(<4 x s8>), %1:_(p0) :: (store (<4 x s8>) into `ptr undef`) + %2:_(p0) = COPY %1:_(p0) + RET 0, implicit %2:_(p0) + +... +--- +name: test_gstore_v4p0 +body: | + bb.0: + ; X86-64-AVX-LABEL: name: test_gstore_v4p0 + ; X86-64-AVX: [[DEF:%[0-9]+]]:_(<4 x p0>) = IMPLICIT_DEF + ; X86-64-AVX-NEXT: [[DEF1:%[0-9]+]]:_(p0) = IMPLICIT_DEF + ; X86-64-AVX-NEXT: G_STORE [[DEF]](<4 x p0>), [[DEF1]](p0) :: (store (<4 x p0>) into `ptr undef`) + ; X86-64-AVX-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY [[DEF1]](p0) + ; X86-64-AVX-NEXT: RET 0, implicit [[COPY]](p0) + %0:_(<4 x p0>) = IMPLICIT_DEF + %1:_(p0) = IMPLICIT_DEF + G_STORE %0:_(<4 x p0>), %1:_(p0) :: (store (<4 x p0>) into `ptr undef`) + %2:_(p0) = COPY %1:_(p0) + RET 0, implicit %2:_(p0) + +... +--- +name: test_gstore_v2p0 +body: | + bb.0: + ; X86-64-AVX-LABEL: name: test_gstore_v2p0 + ; X86-64-AVX: [[DEF:%[0-9]+]]:_(<2 x p0>) = IMPLICIT_DEF + ; X86-64-AVX-NEXT: [[DEF1:%[0-9]+]]:_(p0) = IMPLICIT_DEF + ; X86-64-AVX-NEXT: G_STORE [[DEF]](<2 x p0>), [[DEF1]](p0) :: (store (<2 x p0>) into `ptr undef`) + ; X86-64-AVX-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY [[DEF1]](p0) + ; X86-64-AVX-NEXT: RET 0, implicit [[COPY]](p0) + %0:_(<2 x p0>) = IMPLICIT_DEF + %1:_(p0) = IMPLICIT_DEF + G_STORE %0:_(<2 x p0>), %1:_(p0) :: (store (<2 x p0>) into `ptr undef`) + %2:_(p0) = COPY %1:_(p0) + RET 0, implicit %2:_(p0) + +... diff --git a/llvm/test/CodeGen/X86/GlobalISel/legalize-store-sse.mir b/llvm/test/CodeGen/X86/GlobalISel/legalize-store-sse.mir new file mode 100644 index 0000000..78417f5 --- /dev/null +++ b/llvm/test/CodeGen/X86/GlobalISel/legalize-store-sse.mir @@ -0,0 +1,56 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2 +# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sse -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=X86-64-SEE + +# test G_STORE with vectors + +--- +name: test_gstore_v2s32 +body: | + bb.0: + ; X86-64-SEE-LABEL: name: test_gstore_v2s32 + ; X86-64-SEE: [[DEF:%[0-9]+]]:_(<2 x s32>) = IMPLICIT_DEF + ; X86-64-SEE-NEXT: [[DEF1:%[0-9]+]]:_(p0) = IMPLICIT_DEF + ; X86-64-SEE-NEXT: G_STORE [[DEF]](<2 x s32>), [[DEF1]](p0) :: (store (<2 x s32>) into `ptr undef`) + ; X86-64-SEE-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY [[DEF1]](p0) + ; X86-64-SEE-NEXT: RET 0, implicit [[COPY]](p0) + %0:_(<2 x s32>) = IMPLICIT_DEF + %1:_(p0) = IMPLICIT_DEF + G_STORE %0:_(<2 x s32>), %1:_(p0) :: (store (<2 x s32>) into `ptr undef`) + %2:_(p0) = COPY %1:_(p0) + RET 0, implicit %2:_(p0) + +... +--- +name: test_gstore_v4s8 +body: | + bb.0: + ; X86-64-SEE-LABEL: name: test_gstore_v4s8 + ; X86-64-SEE: [[DEF:%[0-9]+]]:_(<4 x s8>) = IMPLICIT_DEF + ; X86-64-SEE-NEXT: [[DEF1:%[0-9]+]]:_(p0) = IMPLICIT_DEF + ; X86-64-SEE-NEXT: G_STORE [[DEF]](<4 x s8>), [[DEF1]](p0) :: (store (<4 x s8>) into `ptr undef`) + ; X86-64-SEE-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY [[DEF1]](p0) + ; X86-64-SEE-NEXT: RET 0, implicit [[COPY]](p0) + %0:_(<4 x s8>) = IMPLICIT_DEF + %1:_(p0) = IMPLICIT_DEF + G_STORE %0:_(<4 x s8>), %1:_(p0) :: (store (<4 x s8>) into `ptr undef`) + %2:_(p0) = COPY %1:_(p0) + RET 0, implicit %2:_(p0) + +... +--- +name: test_gstore_v2p0 +body: | + bb.0: + ; X86-64-SEE-LABEL: name: test_gstore_v2p0 + ; X86-64-SEE: [[DEF:%[0-9]+]]:_(<2 x p0>) = IMPLICIT_DEF + ; X86-64-SEE-NEXT: [[DEF1:%[0-9]+]]:_(p0) = IMPLICIT_DEF + ; X86-64-SEE-NEXT: G_STORE [[DEF]](<2 x p0>), [[DEF1]](p0) :: (store (<2 x p0>) into `ptr undef`) + ; X86-64-SEE-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY [[DEF1]](p0) + ; X86-64-SEE-NEXT: RET 0, implicit [[COPY]](p0) + %0:_(<2 x p0>) = IMPLICIT_DEF + %1:_(p0) = IMPLICIT_DEF + G_STORE %0:_(<2 x p0>), %1:_(p0) :: (store (<2 x p0>) into `ptr undef`) + %2:_(p0) = COPY %1:_(p0) + RET 0, implicit %2:_(p0) + +... -- 2.7.4