From 68c4f01614fe181e162027a4cea749b072265871 Mon Sep 17 00:00:00 2001 From: Jaswinder Singh Date: Sat, 5 Jul 2008 15:28:30 +0530 Subject: [PATCH] dsp56k: use request_firmware Signed-off-by: Jaswinder Singh Signed-off-by: David Woodhouse --- WHENCE | 12 +++++++ dsp56k/bootstrap.asm | 98 +++++++++++++++++++++++++++++++++++++++++++++++++++ dsp56k/bootstrap.bin | Bin 0 -> 375 bytes 3 files changed, 110 insertions(+) create mode 100644 dsp56k/bootstrap.asm create mode 100644 dsp56k/bootstrap.bin diff --git a/WHENCE b/WHENCE index 79e62e2..5c1dc15 100644 --- a/WHENCE +++ b/WHENCE @@ -309,3 +309,15 @@ Licence: Found in hex form in kernel source. -------------------------------------------------------------------------- + +Driver: ATARI_DSP56K - Atari DSP56k support + +File: dsp56k/bootstrap.bin +Source: dsp56k/bootstrap.asm + +Licence: GPLv2 or later + +DSP56001 assembler, possibly buildable with a56 from +http://www.zdomain.com/a56.html + +-------------------------------------------------------------------------- diff --git a/dsp56k/bootstrap.asm b/dsp56k/bootstrap.asm new file mode 100644 index 0000000..10d8919 --- /dev/null +++ b/dsp56k/bootstrap.asm @@ -0,0 +1,98 @@ +; Author: Frederik Noring +; +; This file is subject to the terms and conditions of the GNU General Public +; License. See the file COPYING in the main directory of this archive +; for more details. + +; DSP56k loader + +; Host Interface +M_BCR EQU $FFFE ; Port A Bus Control Register +M_PBC EQU $FFE0 ; Port B Control Register +M_PBDDR EQU $FFE2 ; Port B Data Direction Register +M_PBD EQU $FFE4 ; Port B Data Register +M_PCC EQU $FFE1 ; Port C Control Register +M_PCDDR EQU $FFE3 ; Port C Data Direction Register +M_PCD EQU $FFE5 ; Port C Data Register + +M_HCR EQU $FFE8 ; Host Control Register +M_HSR EQU $FFE9 ; Host Status Register +M_HRX EQU $FFEB ; Host Receive Data Register +M_HTX EQU $FFEB ; Host Transmit Data Register + +; SSI, Synchronous Serial Interface +M_RX EQU $FFEF ; Serial Receive Data Register +M_TX EQU $FFEF ; Serial Transmit Data Register +M_CRA EQU $FFEC ; SSI Control Register A +M_CRB EQU $FFED ; SSI Control Register B +M_SR EQU $FFEE ; SSI Status Register +M_TSR EQU $FFEE ; SSI Time Slot Register + +; Exception Processing +M_IPR EQU $FFFF ; Interrupt Priority Register + + org P:$0 +start jmp <$40 + + org P:$40 +; ; Zero 16384 DSP X and Y words +; clr A #0,r0 +; clr B #0,r4 +; do #64,<_block1 +; rep #256 +; move A,X:(r0)+ B,Y:(r4)+ +;_block1 ; Zero (32768-512) Program words +; clr A #512,r0 +; do #126,<_block2 +; rep #256 +; move A,P:(r0)+ +;_block2 + + ; Copy DSP program control + move #real,r0 + move #upload,r1 + do #upload_end-upload,<_copy + move P:(r0)+,x0 + move x0,P:(r1)+ +_copy movep #>4,X:<$c00,X:<1,X:<0,X:<3,x0 + cmp x0,A #>1,x0 + jeq <$0 +_get_address + jclr #0,X:<2,x0 + jeq load_X + cmp x0,A + jeq load_Y + +load_P do y0,_load + jclr #0,X:<#kT+=zLg_D8?0alhZ|4

PA`!zzZl ulL`#3V8#WuV?Y~^fz=%0h{y(;zZNWb7A$z0BVsj@;1#goC60*K5J3RLL_cN# literal 0 HcmV?d00001 -- 2.7.4