From 6863651bbdd7dcfad60bae78d1e17898f49ca08b Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Tue, 28 Nov 2017 20:57:10 +0100 Subject: [PATCH] radeonsi: fix layered DCC fast clear MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Cc: 17.2 17.3 Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeon/r600_texture.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index 3fa5f5e..933a4a9 100644 --- a/src/gallium/drivers/radeon/r600_texture.c +++ b/src/gallium/drivers/radeon/r600_texture.c @@ -2485,8 +2485,11 @@ void vi_dcc_clear_level(struct r600_common_context *rctx, assert(rtex->resource.b.b.nr_samples <= 1); clear_size = rtex->surface.dcc_size; } else { + unsigned num_layers = util_max_layer(&rtex->resource.b.b, level) + 1; + dcc_offset += rtex->surface.u.legacy.level[level].dcc_offset; - clear_size = rtex->surface.u.legacy.level[level].dcc_fast_clear_size; + clear_size = rtex->surface.u.legacy.level[level].dcc_fast_clear_size * + num_layers; } rctx->clear_buffer(&rctx->b, dcc_buffer, dcc_offset, clear_size, -- 2.7.4