From 685b1803abc396f2d05238005812f80ea4903adf Mon Sep 17 00:00:00 2001 From: Chandler Carruth Date: Fri, 9 Jan 2015 01:24:36 +0000 Subject: [PATCH] [x86] Add a flag to control the vector shuffle legality predicates that complements the new vector shuffle lowering code path. This flag, naturally, is *off* because we've not tested or evaluated the results of this at all. However, the flag will make it much easier to evaluate whether we can be this aggressive and whether there are missing vector shuffle lowering optimizations. llvm-svn: 225491 --- llvm/lib/Target/X86/X86ISelLowering.cpp | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index e99fd8f..a556f35 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -71,6 +71,13 @@ static cl::opt ExperimentalVectorShuffleLowering( cl::desc("Enable an experimental vector shuffle lowering code path."), cl::Hidden); +static cl::opt ExperimentalVectorShuffleLegality( + "x86-experimental-vector-shuffle-legality", cl::init(false), + cl::desc("Enable experimental shuffle legality based on the experimental " + "shuffle lowering. Should only be used with the experimental " + "shuffle lowering."), + cl::Hidden); + static cl::opt ReciprocalEstimateRefinementSteps( "x86-recip-refinement-steps", cl::init(1), cl::desc("Specify the number of Newton-Raphson iterations applied to the " @@ -20148,6 +20155,14 @@ X86TargetLowering::isShuffleMaskLegal(const SmallVectorImpl &M, if (VT.getSizeInBits() == 64) return false; + // This is an experimental legality test that is tailored to match the + // legality test of the experimental lowering more closely. They are gated + // separately to ease testing of performance differences. + if (ExperimentalVectorShuffleLegality) + // We only care that the types being shuffled are legal. The lowering can + // handle any possible shuffle mask that results. + return isTypeLegal(SVT); + // If this is a single-input shuffle with no 128 bit lane crossings we can // lower it into pshufb. if ((SVT.is128BitVector() && Subtarget->hasSSSE3()) || @@ -20192,6 +20207,14 @@ X86TargetLowering::isVectorClearMaskLegal(const SmallVectorImpl &Mask, return false; MVT SVT = VT.getSimpleVT(); + + // This is an experimental legality test that is tailored to match the + // legality test of the experimental lowering more closely. They are gated + // separately to ease testing of performance differences. + if (ExperimentalVectorShuffleLegality) + // The new vector shuffle lowering is very good at managing zero-inputs. + return isShuffleMaskLegal(Mask, VT); + unsigned NumElts = SVT.getVectorNumElements(); // FIXME: This collection of masks seems suspect. if (NumElts == 2) -- 2.7.4